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1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_ARM64_MACRO_ASSEMBLER_ARM64_INL_H_ | 5 #ifndef V8_ARM64_MACRO_ASSEMBLER_ARM64_INL_H_ |
6 #define V8_ARM64_MACRO_ASSEMBLER_ARM64_INL_H_ | 6 #define V8_ARM64_MACRO_ASSEMBLER_ARM64_INL_H_ |
7 | 7 |
8 #include <ctype.h> | 8 #include <ctype.h> |
9 | 9 |
10 #include "src/globals.h" | 10 #include "src/globals.h" |
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144 } else { | 144 } else { |
145 ConditionalCompareMacro(rn, operand, nzcv, cond, CCMN); | 145 ConditionalCompareMacro(rn, operand, nzcv, cond, CCMN); |
146 } | 146 } |
147 } | 147 } |
148 | 148 |
149 | 149 |
150 void MacroAssembler::Add(const Register& rd, | 150 void MacroAssembler::Add(const Register& rd, |
151 const Register& rn, | 151 const Register& rn, |
152 const Operand& operand) { | 152 const Operand& operand) { |
153 ASSERT(allow_macro_instructions_); | 153 ASSERT(allow_macro_instructions_); |
154 if (operand.IsImmediate() && (operand.ImmediateValue() < 0)) { | 154 if (operand.IsImmediate() && (operand.ImmediateValue() < 0) && |
| 155 IsImmAddSub(-operand.ImmediateValue())) { |
155 AddSubMacro(rd, rn, -operand.ImmediateValue(), LeaveFlags, SUB); | 156 AddSubMacro(rd, rn, -operand.ImmediateValue(), LeaveFlags, SUB); |
156 } else { | 157 } else { |
157 AddSubMacro(rd, rn, operand, LeaveFlags, ADD); | 158 AddSubMacro(rd, rn, operand, LeaveFlags, ADD); |
158 } | 159 } |
159 } | 160 } |
160 | 161 |
161 void MacroAssembler::Adds(const Register& rd, | 162 void MacroAssembler::Adds(const Register& rd, |
162 const Register& rn, | 163 const Register& rn, |
163 const Operand& operand) { | 164 const Operand& operand) { |
164 ASSERT(allow_macro_instructions_); | 165 ASSERT(allow_macro_instructions_); |
165 if (operand.IsImmediate() && (operand.ImmediateValue() < 0)) { | 166 if (operand.IsImmediate() && (operand.ImmediateValue() < 0) && |
| 167 IsImmAddSub(-operand.ImmediateValue())) { |
166 AddSubMacro(rd, rn, -operand.ImmediateValue(), SetFlags, SUB); | 168 AddSubMacro(rd, rn, -operand.ImmediateValue(), SetFlags, SUB); |
167 } else { | 169 } else { |
168 AddSubMacro(rd, rn, operand, SetFlags, ADD); | 170 AddSubMacro(rd, rn, operand, SetFlags, ADD); |
169 } | 171 } |
170 } | 172 } |
171 | 173 |
172 | 174 |
173 void MacroAssembler::Sub(const Register& rd, | 175 void MacroAssembler::Sub(const Register& rd, |
174 const Register& rn, | 176 const Register& rn, |
175 const Operand& operand) { | 177 const Operand& operand) { |
176 ASSERT(allow_macro_instructions_); | 178 ASSERT(allow_macro_instructions_); |
177 if (operand.IsImmediate() && (operand.ImmediateValue() < 0)) { | 179 if (operand.IsImmediate() && (operand.ImmediateValue() < 0) && |
| 180 IsImmAddSub(-operand.ImmediateValue())) { |
178 AddSubMacro(rd, rn, -operand.ImmediateValue(), LeaveFlags, ADD); | 181 AddSubMacro(rd, rn, -operand.ImmediateValue(), LeaveFlags, ADD); |
179 } else { | 182 } else { |
180 AddSubMacro(rd, rn, operand, LeaveFlags, SUB); | 183 AddSubMacro(rd, rn, operand, LeaveFlags, SUB); |
181 } | 184 } |
182 } | 185 } |
183 | 186 |
184 | 187 |
185 void MacroAssembler::Subs(const Register& rd, | 188 void MacroAssembler::Subs(const Register& rd, |
186 const Register& rn, | 189 const Register& rn, |
187 const Operand& operand) { | 190 const Operand& operand) { |
188 ASSERT(allow_macro_instructions_); | 191 ASSERT(allow_macro_instructions_); |
189 if (operand.IsImmediate() && (operand.ImmediateValue() < 0)) { | 192 if (operand.IsImmediate() && (operand.ImmediateValue() < 0) && |
| 193 IsImmAddSub(-operand.ImmediateValue())) { |
190 AddSubMacro(rd, rn, -operand.ImmediateValue(), SetFlags, ADD); | 194 AddSubMacro(rd, rn, -operand.ImmediateValue(), SetFlags, ADD); |
191 } else { | 195 } else { |
192 AddSubMacro(rd, rn, operand, SetFlags, SUB); | 196 AddSubMacro(rd, rn, operand, SetFlags, SUB); |
193 } | 197 } |
194 } | 198 } |
195 | 199 |
196 | 200 |
197 void MacroAssembler::Cmn(const Register& rn, const Operand& operand) { | 201 void MacroAssembler::Cmn(const Register& rn, const Operand& operand) { |
198 ASSERT(allow_macro_instructions_); | 202 ASSERT(allow_macro_instructions_); |
199 Adds(AppropriateZeroRegFor(rn), rn, operand); | 203 Adds(AppropriateZeroRegFor(rn), rn, operand); |
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1697 // characters are reserved for controlling features of the instrumentation. | 1701 // characters are reserved for controlling features of the instrumentation. |
1698 ASSERT(isprint(marker_name[0]) && isprint(marker_name[1])); | 1702 ASSERT(isprint(marker_name[0]) && isprint(marker_name[1])); |
1699 | 1703 |
1700 InstructionAccurateScope scope(this, 1); | 1704 InstructionAccurateScope scope(this, 1); |
1701 movn(xzr, (marker_name[1] << 8) | marker_name[0]); | 1705 movn(xzr, (marker_name[1] << 8) | marker_name[0]); |
1702 } | 1706 } |
1703 | 1707 |
1704 } } // namespace v8::internal | 1708 } } // namespace v8::internal |
1705 | 1709 |
1706 #endif // V8_ARM64_MACRO_ASSEMBLER_ARM64_INL_H_ | 1710 #endif // V8_ARM64_MACRO_ASSEMBLER_ARM64_INL_H_ |
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