src/mips/debug-mips.cc - Issue 367053002: MIPS: KeyedLoadIC should have same register spec as LoadIC.

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Unified Diff: src/mips/debug-mips.cc

Issue 367053002: MIPS: KeyedLoadIC should have same register spec as LoadIC. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge

Patch Set: Created 6 years, 6 months ago

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Index: src/mips/debug-mips.cc

diff --git a/src/mips/debug-mips.cc b/src/mips/debug-mips.cc

index 73c4d5e69d44333466f7f9c1a54044c5b948a154..424a87a14803299d7b3e9596e7ff94cf9f04ba45 100644

--- a/src/mips/debug-mips.cc

+++ b/src/mips/debug-mips.cc

@@ -207,9 +207,7 @@ void DebugCodegen::GenerateStoreICDebugBreak(MacroAssembler* masm) {

void DebugCodegen::GenerateKeyedLoadICDebugBreak(MacroAssembler* masm) {

// Calling convention for keyed IC load (from ic-arm.cc).

- Register receiver = KeyedLoadIC::ReceiverRegister();

- Register name = KeyedLoadIC::NameRegister();

- Generate_DebugBreakCallHelper(masm, receiver.bit() | name.bit(), 0);

+ GenerateLoadICDebugBreak(masm);

}

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