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1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/v8.h" | 5 #include "src/v8.h" |
6 | 6 |
7 #if V8_TARGET_ARCH_ARM64 | 7 #if V8_TARGET_ARCH_ARM64 |
8 | 8 |
9 #include "src/bootstrapper.h" | 9 #include "src/bootstrapper.h" |
10 #include "src/codegen.h" | 10 #include "src/codegen.h" |
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57 UseScratchRegisterScope temps(this); | 57 UseScratchRegisterScope temps(this); |
58 | 58 |
59 if (operand.NeedsRelocation(this)) { | 59 if (operand.NeedsRelocation(this)) { |
60 Register temp = temps.AcquireX(); | 60 Register temp = temps.AcquireX(); |
61 Ldr(temp, operand.immediate()); | 61 Ldr(temp, operand.immediate()); |
62 Logical(rd, rn, temp, op); | 62 Logical(rd, rn, temp, op); |
63 | 63 |
64 } else if (operand.IsImmediate()) { | 64 } else if (operand.IsImmediate()) { |
65 int64_t immediate = operand.ImmediateValue(); | 65 int64_t immediate = operand.ImmediateValue(); |
66 unsigned reg_size = rd.SizeInBits(); | 66 unsigned reg_size = rd.SizeInBits(); |
67 ASSERT(rd.Is64Bits() || is_uint32(immediate)); | |
68 | 67 |
69 // If the operation is NOT, invert the operation and immediate. | 68 // If the operation is NOT, invert the operation and immediate. |
70 if ((op & NOT) == NOT) { | 69 if ((op & NOT) == NOT) { |
71 op = static_cast<LogicalOp>(op & ~NOT); | 70 op = static_cast<LogicalOp>(op & ~NOT); |
72 immediate = ~immediate; | 71 immediate = ~immediate; |
73 if (rd.Is32Bits()) { | |
74 immediate &= kWRegMask; | |
75 } | |
76 } | 72 } |
77 | 73 |
| 74 // Ignore the top 32 bits of an immediate if we're moving to a W register. |
| 75 if (rd.Is32Bits()) { |
| 76 // Check that the top 32 bits are consistent. |
| 77 ASSERT(((immediate >> kWRegSizeInBits) == 0) || |
| 78 ((immediate >> kWRegSizeInBits) == -1)); |
| 79 immediate &= kWRegMask; |
| 80 } |
| 81 |
| 82 ASSERT(rd.Is64Bits() || is_uint32(immediate)); |
| 83 |
78 // Special cases for all set or all clear immediates. | 84 // Special cases for all set or all clear immediates. |
79 if (immediate == 0) { | 85 if (immediate == 0) { |
80 switch (op) { | 86 switch (op) { |
81 case AND: | 87 case AND: |
82 Mov(rd, 0); | 88 Mov(rd, 0); |
83 return; | 89 return; |
84 case ORR: // Fall through. | 90 case ORR: // Fall through. |
85 case EOR: | 91 case EOR: |
86 Mov(rd, rn); | 92 Mov(rd, rn); |
87 return; | 93 return; |
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5304 } | 5310 } |
5305 } | 5311 } |
5306 | 5312 |
5307 | 5313 |
5308 #undef __ | 5314 #undef __ |
5309 | 5315 |
5310 | 5316 |
5311 } } // namespace v8::internal | 5317 } } // namespace v8::internal |
5312 | 5318 |
5313 #endif // V8_TARGET_ARCH_ARM64 | 5319 #endif // V8_TARGET_ARCH_ARM64 |
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