Subzero: lower the rest of the atomic operations.

src/IceIntrinsics.cpp

 //===- subzero/src/IceIntrinsics.cpp - Functions related to intrinsics ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the Intrinsics utilities for matching and
@@ skipping 28 matching lines @@
   }
     AtomicCmpxchgInit(IceType_i8, "i8"),
     AtomicCmpxchgInit(IceType_i16, "i16"),
     AtomicCmpxchgInit(IceType_i32, "i32"),
     AtomicCmpxchgInit(IceType_i64, "i64"),
 #undef AtomicCmpxchgInit
     { { { Intrinsics::AtomicFence, true }, { IceType_void, IceType_i32 }, 2 },
       "nacl.atomic.fence" },
     { { { Intrinsics::AtomicFenceAll, true }, { IceType_void }, 1 },
       "nacl.atomic.fence.all" },
-    { { { Intrinsics::AtomicIsLockFree, true },
+    { { { Intrinsics::AtomicIsLockFree, false },
         { IceType_i1, IceType_i32, IceType_i32 }, 3 },
       "nacl.atomic.is.lock.free" },
 
 #define AtomicLoadInit(Overload, NameSuffix)                                   \
   {                                                                            \
     {                                                                          \
       { Intrinsics::AtomicLoad, true }                                         \
       , { Overload, IceType_i32, IceType_i32 }, 3                              \
     }                                                                          \
     , "nacl.atomic.load." NameSuffix                                           \
@@ skipping 138 matching lines @@
     return NULL;
   return &it->second;
 }
 
 bool Intrinsics::VerifyMemoryOrder(uint64_t Order) {
   // There is only one memory ordering for atomics allowed right now.
   return Order == Intrinsics::MemoryOrderSequentiallyConsistent;
 }
 
 } // end of namespace Ice