Move platform abstraction to base library

src/mips/assembler-mips-inl.h

 
 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
@@ skipping 21 matching lines @@
 // The original source code covered by the above license above has been
 // modified significantly by Google Inc.
 // Copyright 2012 the V8 project authors. All rights reserved.
 
 
 #ifndef V8_MIPS_ASSEMBLER_MIPS_INL_H_
 #define V8_MIPS_ASSEMBLER_MIPS_INL_H_
 
 #include "src/mips/assembler-mips.h"
 
-#include "src/cpu.h"
+#include "src/assembler.h"
 #include "src/debug.h"
 
 
 namespace v8 {
 namespace internal {
 
 
 bool CpuFeatures::SupportsCrankshaft() { return IsSupported(FPU); }
 
 
@@ skipping 65 matching lines @@
     uint32_t scope2 = reinterpret_cast<uint32_t>(pc_) & ~kImm28Mask;
 
     if (scope1 != scope2) {
       Assembler::JumpLabelToJumpRegister(pc_);
     }
   }
   if (IsInternalReference(rmode_)) {
     // Absolute code pointer inside code object moves with the code object.
     byte* p = reinterpret_cast<byte*>(pc_);
     int count = Assembler::RelocateInternalReference(p, delta);
-    CPU::FlushICache(p, count * sizeof(uint32_t));
+    CpuFeatures::FlushICache(p, count * sizeof(uint32_t));
   }
 }
 
 
 Address RelocInfo::target_address() {
   ASSERT(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
   return Assembler::target_address_at(pc_, host_);
 }
 
 
@@ skipping 298 matching lines @@
   }
   *reinterpret_cast<Instr*>(pc_) = x;
   pc_ += kInstrSize;
   CheckTrampolinePoolQuick();
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_MIPS_ASSEMBLER_MIPS_INL_H_