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Side by Side Diff: src/arm64/assembler-arm64-inl.h

Issue 358363002: Move platform abstraction to base library (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: updates Created 6 years, 5 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_ARM64_ASSEMBLER_ARM64_INL_H_ 5 #ifndef V8_ARM64_ASSEMBLER_ARM64_INL_H_
6 #define V8_ARM64_ASSEMBLER_ARM64_INL_H_ 6 #define V8_ARM64_ASSEMBLER_ARM64_INL_H_
7 7
8 #include "src/arm64/assembler-arm64.h" 8 #include "src/arm64/assembler-arm64.h"
9 #include "src/cpu.h" 9 #include "src/assembler.h"
10 #include "src/debug.h" 10 #include "src/debug.h"
11 11
12 12
13 namespace v8 { 13 namespace v8 {
14 namespace internal { 14 namespace internal {
15 15
16 16
17 bool CpuFeatures::SupportsCrankshaft() { return true; } 17 bool CpuFeatures::SupportsCrankshaft() { return true; }
18 18
19 19
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645 } 645 }
646 646
647 647
648 void Assembler::set_target_address_at(Address pc, 648 void Assembler::set_target_address_at(Address pc,
649 ConstantPoolArray* constant_pool, 649 ConstantPoolArray* constant_pool,
650 Address target, 650 Address target,
651 ICacheFlushMode icache_flush_mode) { 651 ICacheFlushMode icache_flush_mode) {
652 Memory::Address_at(target_pointer_address_at(pc)) = target; 652 Memory::Address_at(target_pointer_address_at(pc)) = target;
653 // Intuitively, we would think it is necessary to always flush the 653 // Intuitively, we would think it is necessary to always flush the
654 // instruction cache after patching a target address in the code as follows: 654 // instruction cache after patching a target address in the code as follows:
655 // CPU::FlushICache(pc, sizeof(target)); 655 // CpuFeatures::FlushICache(pc, sizeof(target));
656 // However, on ARM, an instruction is actually patched in the case of 656 // However, on ARM, an instruction is actually patched in the case of
657 // embedded constants of the form: 657 // embedded constants of the form:
658 // ldr ip, [pc, #...] 658 // ldr ip, [pc, #...]
659 // since the instruction accessing this address in the constant pool remains 659 // since the instruction accessing this address in the constant pool remains
660 // unchanged, a flush is not required. 660 // unchanged, a flush is not required.
661 } 661 }
662 662
663 663
664 void Assembler::set_target_address_at(Address pc, 664 void Assembler::set_target_address_at(Address pc,
665 Code* code, 665 Code* code,
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1255 1255
1256 1256
1257 void Assembler::ClearRecordedAstId() { 1257 void Assembler::ClearRecordedAstId() {
1258 recorded_ast_id_ = TypeFeedbackId::None(); 1258 recorded_ast_id_ = TypeFeedbackId::None();
1259 } 1259 }
1260 1260
1261 1261
1262 } } // namespace v8::internal 1262 } } // namespace v8::internal
1263 1263
1264 #endif // V8_ARM64_ASSEMBLER_ARM64_INL_H_ 1264 #endif // V8_ARM64_ASSEMBLER_ARM64_INL_H_
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