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| 1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #ifndef V8_ARM_CONSTANTS_ARM_H_ | 5 #ifndef V8_ARM_CONSTANTS_ARM_H_ |
| 6 #define V8_ARM_CONSTANTS_ARM_H_ | 6 #define V8_ARM_CONSTANTS_ARM_H_ |
| 7 | 7 |
| 8 // ARM EABI is required. | 8 // ARM EABI is required. |
| 9 #if defined(__arm__) && !defined(__ARM_EABI__) | 9 #if defined(__arm__) && !defined(__ARM_EABI__) |
| 10 #error ARM EABI support is required. | 10 #error ARM EABI support is required. |
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| 561 } | 561 } |
| 562 inline int RegShiftValue() const { return Bit(4); } | 562 inline int RegShiftValue() const { return Bit(4); } |
| 563 inline int RsValue() const { return Bits(11, 8); } | 563 inline int RsValue() const { return Bits(11, 8); } |
| 564 inline int ShiftAmountValue() const { return Bits(11, 7); } | 564 inline int ShiftAmountValue() const { return Bits(11, 7); } |
| 565 // with immediate | 565 // with immediate |
| 566 inline int RotateValue() const { return Bits(11, 8); } | 566 inline int RotateValue() const { return Bits(11, 8); } |
| 567 inline int Immed8Value() const { return Bits(7, 0); } | 567 inline int Immed8Value() const { return Bits(7, 0); } |
| 568 inline int Immed4Value() const { return Bits(19, 16); } | 568 inline int Immed4Value() const { return Bits(19, 16); } |
| 569 inline int ImmedMovwMovtValue() const { | 569 inline int ImmedMovwMovtValue() const { |
| 570 return Immed4Value() << 12 | Offset12Value(); } | 570 return Immed4Value() << 12 | Offset12Value(); } |
| 571 DECLARE_STATIC_ACCESSOR(ImmedMovwMovtValue); |
| 571 | 572 |
| 572 // Fields used in Load/Store instructions | 573 // Fields used in Load/Store instructions |
| 573 inline int PUValue() const { return Bits(24, 23); } | 574 inline int PUValue() const { return Bits(24, 23); } |
| 574 inline int PUField() const { return BitField(24, 23); } | 575 inline int PUField() const { return BitField(24, 23); } |
| 575 inline int BValue() const { return Bit(22); } | 576 inline int BValue() const { return Bit(22); } |
| 576 inline int WValue() const { return Bit(21); } | 577 inline int WValue() const { return Bit(21); } |
| 577 inline int LValue() const { return Bit(20); } | 578 inline int LValue() const { return Bit(20); } |
| 578 // with register uses same fields as Data processing instructions above | 579 // with register uses same fields as Data processing instructions above |
| 579 // with immediate | 580 // with immediate |
| 580 inline int Offset12Value() const { return Bits(11, 0); } | 581 inline int Offset12Value() const { return Bits(11, 0); } |
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| 683 static int Number(const char* name, bool* is_double); | 684 static int Number(const char* name, bool* is_double); |
| 684 | 685 |
| 685 private: | 686 private: |
| 686 static const char* names_[kNumVFPRegisters]; | 687 static const char* names_[kNumVFPRegisters]; |
| 687 }; | 688 }; |
| 688 | 689 |
| 689 | 690 |
| 690 } } // namespace v8::internal | 691 } } // namespace v8::internal |
| 691 | 692 |
| 692 #endif // V8_ARM_CONSTANTS_ARM_H_ | 693 #endif // V8_ARM_CONSTANTS_ARM_H_ |
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