Satisfy new -Wunused-local-typedefs in gcc 4.8 in the simulators.

runtime/vm/assembler_arm_test.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/os.h"
 #include "vm/unit_test.h"
 #include "vm/virtual_memory.h"
 
 namespace dart {
 
 #define __ assembler->
 
 
 ASSEMBLER_TEST_GENERATE(Simple, assembler) {
   __ mov(R0, Operand(42));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Simple, test) {
-  typedef int (*SimpleCode)();
+  typedef int (*SimpleCode)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(MoveNegated, assembler) {
   __ mvn(R0, Operand(42));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(MoveNegated, test) {
   EXPECT(test != NULL);
-  typedef int (*MoveNegated)();
+  typedef int (*MoveNegated)() DART_UNUSED;
   EXPECT_EQ(~42, EXECUTE_TEST_CODE_INT32(MoveNegated, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(MoveRotImm, assembler) {
   Operand o;
   EXPECT(Operand::CanHold(0x00550000, &o));
   __ mov(R0, o);
   EXPECT(Operand::CanHold(0x30000003, &o));
   __ add(R0, R0, o);
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(MoveRotImm, test) {
   EXPECT(test != NULL);
-  typedef int (*MoveRotImm)();
+  typedef int (*MoveRotImm)() DART_UNUSED;
   EXPECT_EQ(0x30550003, EXECUTE_TEST_CODE_INT32(MoveRotImm, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(MovImm16, assembler) {
 #if defined(USING_SIMULATOR)
   // ARMv7 is the default.
   HostCPUFeatures::set_arm_version(ARMv6);
   __ LoadDecodableImmediate(R0, 0x12345678 << 1);
   HostCPUFeatures::set_arm_version(ARMv7);
   __ LoadDecodableImmediate(R1, 0x12345678);
   __ sub(R0, R0, Operand(R1));
   __ bx(LR);
 #else
   __ LoadDecodableImmediate(R0, 0x12345678);
   __ bx(LR);
 #endif
 }
 
 
 ASSEMBLER_TEST_RUN(MovImm16, test) {
   EXPECT(test != NULL);
-  typedef int (*MovImm16)();
+  typedef int (*MovImm16)() DART_UNUSED;
   EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INT32(MovImm16, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(LoadImmediate, assembler) {
   __ mov(R0, Operand(0));
   __ cmp(R0, Operand(0));
   __ LoadImmediate(R0, 0x12345678, EQ);
   __ LoadImmediate(R0, 0x87654321, NE);
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(LoadImmediate, test) {
   EXPECT(test != NULL);
-  typedef int (*LoadImmediate)();
+  typedef int (*LoadImmediate)() DART_UNUSED;
   EXPECT_EQ(0x12345678, EXECUTE_TEST_CODE_INT32(LoadImmediate, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vmov, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ mov(R3, Operand(43));
     __ mov(R1, Operand(41));
     __ vmovsrr(S1, R1, R3);  // S1:S2 = 41:43
     __ vmovs(S0, S2);  // S0 = S2, S0:S1 == 43:41
     __ vmovd(D2, D0);  // D2 = D0, S4:S5 == 43:41
     __ vmovrs(R3, S5);  // R3 = S5, R3 == 41
     __ vmovrrs(R1, R2, S4);  // R1:R2 = S4:S5, R1:R2 == 43:41
     __ vmovdrr(D3, R3, R2);  // D3 = R3:R2, S6:S7 == 41:41
     __ vmovsr(S7, R1);  // S7 = R1, S6:S7 == 41:43
     __ vmovrrd(R0, R1, D3);  // R0:R1 = D3, R0:R1 == 41:43
     __ sub(R0, R1, Operand(R0));  // 43-41
   } else {
     __ LoadImmediate(R0, 2);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Vmov, test) {
   EXPECT(test != NULL);
-  typedef int (*Vmov)();
+  typedef int (*Vmov)() DART_UNUSED;
   EXPECT_EQ(2, EXECUTE_TEST_CODE_INT32(Vmov, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(SingleVLoadStore, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ LoadImmediate(R0, bit_cast<int32_t, float>(12.3f));
     __ mov(R2, Operand(SP));
     __ str(R0, Address(SP, (-kWordSize * 30), Address::PreIndex));
     __ vldrs(S0, Address(R2, (-kWordSize * 30)));
     __ vadds(S0, S0, S0);
     __ vstrs(S0, Address(R2, (-kWordSize * 30)));
     __ ldr(R0, Address(SP, (kWordSize * 30), Address::PostIndex));
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(SingleVLoadStore, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
-    typedef float (*SingleVLoadStore)();
+    typedef float (*SingleVLoadStore)() DART_UNUSED;
     float res = EXECUTE_TEST_CODE_FLOAT(SingleVLoadStore, test->entry());
     EXPECT_FLOAT_EQ(2*12.3f, res, 0.001f);
   } else {
-    typedef int (*SingleVLoadStore)();
+    typedef int (*SingleVLoadStore)() DART_UNUSED;
     EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SingleVLoadStore, test->entry()));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(SingleVShiftLoadStore, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ LoadImmediate(R0, bit_cast<int32_t, float>(12.3f));
     __ mov(R2, Operand(SP));
     // Expressing __str(R0, Address(SP, (-kWordSize * 32), Address::PreIndex));
     // as:
     __ mov(R1, Operand(kWordSize));
     __ str(R0, Address(SP, R1, LSL, 5, Address::NegPreIndex));
     __ vldrs(S0, Address(R2, (-kWordSize * 32)));
     __ vadds(S0, S0, S0);
     __ vstrs(S0, Address(R2, (-kWordSize * 32)));
     // Expressing __ldr(R0, Address(SP, (kWordSize * 32), Address::PostIndex));
     // as:
     __ ldr(R0, Address(SP, R1, LSL, 5, Address::PostIndex));
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(SingleVShiftLoadStore, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
-    typedef float (*SingleVLoadStore)();
+    typedef float (*SingleVLoadStore)() DART_UNUSED;
     float res = EXECUTE_TEST_CODE_FLOAT(SingleVLoadStore, test->entry());
     EXPECT_FLOAT_EQ(2*12.3f, res, 0.001f);
   } else {
-    typedef int (*SingleVLoadStore)();
+    typedef int (*SingleVLoadStore)() DART_UNUSED;
     EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SingleVLoadStore, test->entry()));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(DoubleVLoadStore, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     int64_t value = bit_cast<int64_t, double>(12.3);
     __ LoadImmediate(R0, Utils::Low32Bits(value));
     __ LoadImmediate(R1, Utils::High32Bits(value));
     __ mov(R2, Operand(SP));
     __ str(R0, Address(SP, (-kWordSize * 30), Address::PreIndex));
     __ str(R1, Address(R2, (-kWordSize * 29)));
     __ vldrd(D0, Address(R2, (-kWordSize * 30)));
     __ vaddd(D0, D0, D0);
     __ vstrd(D0, Address(R2, (-kWordSize * 30)));
     __ ldr(R1, Address(R2, (-kWordSize * 29)));
     __ ldr(R0, Address(SP, (kWordSize * 30), Address::PostIndex));
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(DoubleVLoadStore, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
-    typedef double (*DoubleVLoadStore)();
+    typedef double (*DoubleVLoadStore)() DART_UNUSED;
     float res = EXECUTE_TEST_CODE_DOUBLE(DoubleVLoadStore, test->entry());
     EXPECT_FLOAT_EQ(2*12.3f, res, 0.001f);
   } else {
-    typedef int (*DoubleVLoadStore)();
+    typedef int (*DoubleVLoadStore)() DART_UNUSED;
     EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(DoubleVLoadStore, test->entry()));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(SingleFPOperations, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ LoadSImmediate(S0, 12.3f);
     __ LoadSImmediate(S1, 3.4f);
     __ vnegs(S0, S0);  // -12.3f
     __ vabss(S0, S0);  // 12.3f
     __ vadds(S0, S0, S1);  // 15.7f
     __ vmuls(S0, S0, S1);  // 53.38f
     __ vsubs(S0, S0, S1);  // 49.98f
     __ vdivs(S0, S0, S1);  // 14.7f
     __ vsqrts(S0, S0);  // 3.8340579f
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(SingleFPOperations, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
-    typedef float (*SingleFPOperations)();
+    typedef float (*SingleFPOperations)() DART_UNUSED;
     float res = EXECUTE_TEST_CODE_FLOAT(SingleFPOperations, test->entry());
     EXPECT_FLOAT_EQ(3.8340579f, res, 0.001f);
   } else {
-    typedef int (*SingleFPOperations)();
+    typedef int (*SingleFPOperations)() DART_UNUSED;
     EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SingleFPOperations, test->entry()));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(DoubleFPOperations, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ LoadDImmediate(D0, 12.3, R0);
     __ LoadDImmediate(D1, 3.4, R0);
     __ vnegd(D0, D0);  // -12.3
     __ vabsd(D0, D0);  // 12.3
     __ vaddd(D0, D0, D1);  // 15.7
     __ vmuld(D0, D0, D1);  // 53.38
     __ vsubd(D0, D0, D1);  // 49.98
     __ vdivd(D0, D0, D1);  // 14.7
     __ vsqrtd(D0, D0);  // 3.8340579
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(DoubleFPOperations, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
-    typedef double (*DoubleFPOperations)();
+    typedef double (*DoubleFPOperations)() DART_UNUSED;
     double res = EXECUTE_TEST_CODE_DOUBLE(DoubleFPOperations, test->entry());
     EXPECT_FLOAT_EQ(3.8340579, res, 0.001);
   } else {
-    typedef int (*DoubleFPOperations)();
+    typedef int (*DoubleFPOperations)() DART_UNUSED;
     EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(DoubleFPOperations, test->entry()));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(DoubleSqrtNeg, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     // Check that sqrt of a negative double gives NaN.
     __ LoadDImmediate(D1, -1.0, R0);
     __ vsqrtd(D0, D1);
     __ vcmpd(D0, D0);
     __ vmstat();
     __ mov(R0, Operand(1), VS);
     __ mov(R0, Operand(0), VC);
   } else {
     __ LoadImmediate(R0, 1);
   }
   __ Ret();
 }
 
 
 ASSEMBLER_TEST_RUN(DoubleSqrtNeg, test) {
   EXPECT(test != NULL);
-  typedef int (*DoubleSqrtNeg)();
+  typedef int (*DoubleSqrtNeg)() DART_UNUSED;
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(DoubleSqrtNeg, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(IntToDoubleConversion, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ mov(R3, Operand(6));
     __ vmovsr(S3, R3);
     __ vcvtdi(D0, S3);
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(IntToDoubleConversion, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
-    typedef double (*IntToDoubleConversionCode)();
+    typedef double (*IntToDoubleConversionCode)() DART_UNUSED;
     double res = EXECUTE_TEST_CODE_DOUBLE(IntToDoubleConversionCode,
                                           test->entry());
     EXPECT_FLOAT_EQ(6.0, res, 0.001);
   } else {
-    typedef int (*IntToDoubleConversionCode)();
+    typedef int (*IntToDoubleConversionCode)() DART_UNUSED;
     EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(IntToDoubleConversionCode,
                                          test->entry()));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(LongToDoubleConversion, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     int64_t value = 60000000000LL;
     __ LoadImmediate(R0, Utils::Low32Bits(value));
     __ LoadImmediate(R1, Utils::High32Bits(value));
     __ vmovsr(S0, R0);
     __ vmovsr(S2, R1);
     __ vcvtdu(D0, S0);
     __ vcvtdi(D1, S2);
     __ LoadDImmediate(D2, 1.0 * (1LL << 32), R0);
     __ vmlad(D0, D1, D2);
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(LongToDoubleConversion, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
-    typedef double (*LongToDoubleConversionCode)();
+    typedef double (*LongToDoubleConversionCode)() DART_UNUSED;
     double res = EXECUTE_TEST_CODE_DOUBLE(LongToDoubleConversionCode,
                                           test->entry());
     EXPECT_FLOAT_EQ(60000000000.0, res, 0.001);
   } else {
-    typedef int (*LongToDoubleConversionCode)();
+    typedef int (*LongToDoubleConversionCode)() DART_UNUSED;
     EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(LongToDoubleConversionCode,
                                          test->entry()));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(IntToFloatConversion, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ mov(R3, Operand(6));
     __ vmovsr(S3, R3);
     __ vcvtsi(S0, S3);
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(IntToFloatConversion, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
-    typedef float (*IntToFloatConversionCode)();
+    typedef float (*IntToFloatConversionCode)() DART_UNUSED;
     float res = EXECUTE_TEST_CODE_FLOAT(IntToFloatConversionCode,
                                         test->entry());
     EXPECT_FLOAT_EQ(6.0, res, 0.001);
   } else {
-    typedef int (*IntToFloatConversionCode)();
+    typedef int (*IntToFloatConversionCode)() DART_UNUSED;
     EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(IntToFloatConversionCode,
                                          test->entry()));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(FloatToIntConversion, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ vcvtis(S1, S0);
     __ vmovrs(R0, S1);
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(FloatToIntConversion, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
-    typedef int (*FloatToIntConversion)(float arg);
+    typedef int (*FloatToIntConversion)(float arg) DART_UNUSED;
     EXPECT_EQ(12,
               EXECUTE_TEST_CODE_INT32_F(FloatToIntConversion, test->entry(),
                                         12.8f));
     EXPECT_EQ(INT_MIN,
               EXECUTE_TEST_CODE_INT32_F(FloatToIntConversion, test->entry(),
                                         -FLT_MAX));
     EXPECT_EQ(INT_MAX,
               EXECUTE_TEST_CODE_INT32_F(FloatToIntConversion, test->entry(),
                                         FLT_MAX));
   } else {
-    typedef int (*FloatToIntConversion)();
+    typedef int (*FloatToIntConversion)() DART_UNUSED;
     EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(FloatToIntConversion, test->entry()));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(DoubleToIntConversion, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ vcvtid(S0, D0);
     __ vmovrs(R0, S0);
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(DoubleToIntConversion, test) {
   if (TargetCPUFeatures::vfp_supported()) {
-    typedef int (*DoubleToIntConversion)(double arg);
+    typedef int (*DoubleToIntConversion)(double arg) DART_UNUSED;
     EXPECT(test != NULL);
     EXPECT_EQ(12,
               EXECUTE_TEST_CODE_INT32_D(DoubleToIntConversion, test->entry(),
                                         12.8));
     EXPECT_EQ(INT_MIN,
               EXECUTE_TEST_CODE_INT32_D(DoubleToIntConversion, test->entry(),
                                         -DBL_MAX));
     EXPECT_EQ(INT_MAX,
               EXECUTE_TEST_CODE_INT32_D(DoubleToIntConversion, test->entry(),
                                         DBL_MAX));
   } else {
-    typedef int (*DoubleToIntConversion)();
+    typedef int (*DoubleToIntConversion)() DART_UNUSED;
     EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(DoubleToIntConversion, test->entry()));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(FloatToDoubleConversion, assembler) {
   __ LoadSImmediate(S2, 12.8f);
   __ vcvtds(D0, S2);
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(FloatToDoubleConversion, test) {
-  typedef double (*FloatToDoubleConversionCode)();
+  typedef double (*FloatToDoubleConversionCode)() DART_UNUSED;
   EXPECT(test != NULL);
   double res = EXECUTE_TEST_CODE_DOUBLE(FloatToDoubleConversionCode,
                                         test->entry());
   EXPECT_FLOAT_EQ(12.8, res, 0.001);
 }
 
 
 ASSEMBLER_TEST_GENERATE(DoubleToFloatConversion, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ LoadDImmediate(D1, 12.8, R0);
     __ vcvtsd(S0, D1);
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(DoubleToFloatConversion, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
-    typedef float (*DoubleToFloatConversionCode)();
+    typedef float (*DoubleToFloatConversionCode)() DART_UNUSED;
     float res = EXECUTE_TEST_CODE_FLOAT(DoubleToFloatConversionCode,
                                         test->entry());
     EXPECT_FLOAT_EQ(12.8, res, 0.001);
   } else {
-    typedef int (*DoubleToFloatConversionCode)();
+    typedef int (*DoubleToFloatConversionCode)() DART_UNUSED;
     EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(DoubleToFloatConversionCode,
                                          test->entry()));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(FloatCompare, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     // Test 12.3f vs 12.5f.
     __ LoadSImmediate(S0, 12.3f);
@@ skipping 19 matching lines @@
   } else {
     __ LoadImmediate(R0, 0);
   }
   // R0 is 0 if all tests passed.
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(FloatCompare, test) {
   EXPECT(test != NULL);
-  typedef int (*FloatCompare)();
+  typedef int (*FloatCompare)() DART_UNUSED;
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(FloatCompare, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(DoubleCompare, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     // Test 12.3 vs 12.5.
     __ LoadDImmediate(D0, 12.3, R1);
     __ LoadDImmediate(D1, 12.5, R1);
 
@@ skipping 17 matching lines @@
   } else {
     __ LoadImmediate(R0, 0);
   }
   // R0 is 0 if all tests passed.
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(DoubleCompare, test) {
   EXPECT(test != NULL);
-  typedef int (*DoubleCompare)();
+  typedef int (*DoubleCompare)() DART_UNUSED;
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(DoubleCompare, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Loop, assembler) {
   Label loop_entry;
   __ mov(R0, Operand(1));
   __ mov(R1, Operand(2));
   __ Bind(&loop_entry);
   __ mov(R0, Operand(R0, LSL, 1));
   __ movs(R1, Operand(R1, LSR, 1));
   __ b(&loop_entry, NE);
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Loop, test) {
   EXPECT(test != NULL);
-  typedef int (*Loop)();
+  typedef int (*Loop)() DART_UNUSED;
   EXPECT_EQ(4, EXECUTE_TEST_CODE_INT32(Loop, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(ForwardBranch, assembler) {
   Label skip;
   __ mov(R0, Operand(42));
   __ b(&skip);
   __ mov(R0, Operand(11));
   __ Bind(&skip);
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(ForwardBranch, test) {
   EXPECT(test != NULL);
-  typedef int (*ForwardBranch)();
+  typedef int (*ForwardBranch)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(ForwardBranch, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Loop2, assembler) {
   Label loop_entry;
   __ set_use_far_branches(true);
   __ mov(R0, Operand(1));
   __ mov(R1, Operand(2));
   __ Bind(&loop_entry);
   __ mov(R0, Operand(R0, LSL, 1));
   __ movs(R1, Operand(R1, LSR, 1));
   __ b(&loop_entry, NE);
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Loop2, test) {
   EXPECT(test != NULL);
-  typedef int (*Loop)();
+  typedef int (*Loop)() DART_UNUSED;
   EXPECT_EQ(4, EXECUTE_TEST_CODE_INT32(Loop, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Loop3, assembler) {
   Label loop_entry;
   __ set_use_far_branches(true);
   __ mov(R0, Operand(1));
   __ mov(R1, Operand(2));
   __ Bind(&loop_entry);
   for (int i = 0; i < (1 << 22); i++) {
     __ nop();
   }
   __ mov(R0, Operand(R0, LSL, 1));
   __ movs(R1, Operand(R1, LSR, 1));
   __ b(&loop_entry, NE);
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Loop3, test) {
   EXPECT(test != NULL);
-  typedef int (*Loop)();
+  typedef int (*Loop)() DART_UNUSED;
   EXPECT_EQ(4, EXECUTE_TEST_CODE_INT32(Loop, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(LoadStore, assembler) {
   __ mov(R1, Operand(123));
   __ Push(R1);
   __ Pop(R0);
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(LoadStore, test) {
   EXPECT(test != NULL);
-  typedef int (*LoadStore)();
+  typedef int (*LoadStore)() DART_UNUSED;
   EXPECT_EQ(123, EXECUTE_TEST_CODE_INT32(LoadStore, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(AddSub, assembler) {
   __ mov(R1, Operand(40));
   __ sub(R1, R1, Operand(2));
   __ add(R0, R1, Operand(4));
   __ rsbs(R0, R0, Operand(100));
   __ rsc(R0, R0, Operand(100));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(AddSub, test) {
   EXPECT(test != NULL);
-  typedef int (*AddSub)();
+  typedef int (*AddSub)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(AddSub, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(AddCarry, assembler) {
   __ LoadImmediate(R2, 0xFFFFFFFF);
   __ mov(R1, Operand(1));
   __ mov(R0, Operand(0));
   __ adds(R2, R2, Operand(R1));
   __ adcs(R0, R0, Operand(R0));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(AddCarry, test) {
   EXPECT(test != NULL);
-  typedef int (*AddCarry)();
+  typedef int (*AddCarry)() DART_UNUSED;
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(AddCarry, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(SubCarry, assembler) {
   __ LoadImmediate(R2, 0x0);
   __ mov(R1, Operand(1));
   __ mov(R0, Operand(0));
   __ subs(R2, R2, Operand(R1));
   __ sbcs(R0, R0, Operand(R0));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(SubCarry, test) {
   EXPECT(test != NULL);
-  typedef int (*SubCarry)();
+  typedef int (*SubCarry)() DART_UNUSED;
   EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SubCarry, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(AndOrr, assembler) {
   __ mov(R1, Operand(40));
   __ mov(R2, Operand(0));
   __ and_(R1, R2, Operand(R1));
   __ mov(R3, Operand(42));
   __ orr(R0, R1, Operand(R3));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(AndOrr, test) {
   EXPECT(test != NULL);
-  typedef int (*AndOrr)();
+  typedef int (*AndOrr)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(AndOrr, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Orrs, assembler) {
   __ mov(R0, Operand(0));
   __ tst(R0, Operand(R1));  // Set zero-flag.
   __ orrs(R0, R0, Operand(1));  // Clear zero-flag.
   __ bx(LR, EQ);
   __ mov(R0, Operand(42));
   __ bx(LR, NE);  // Only this return should fire.
   __ mov(R0, Operand(2));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Orrs, test) {
   EXPECT(test != NULL);
-  typedef int (*Orrs)();
+  typedef int (*Orrs)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Orrs, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Multiply, assembler) {
   __ mov(R1, Operand(20));
   __ mov(R2, Operand(40));
   __ mul(R3, R2, R1);
   __ mov(R0, Operand(R3));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Multiply, test) {
   EXPECT(test != NULL);
-  typedef int (*Multiply)();
+  typedef int (*Multiply)() DART_UNUSED;
   EXPECT_EQ(800, EXECUTE_TEST_CODE_INT32(Multiply, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(QuotientRemainder, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ vmovsr(S2, R0);
     __ vmovsr(S4, R2);
     __ vcvtdi(D1, S2);
     __ vcvtdi(D2, S4);
     __ vdivd(D0, D1, D2);
     __ vcvtid(S0, D0);
     __ vmovrs(R1, S0);  // r1 = r0/r2
     __ mls(R0, R1, R2, R0);  // r0 = r0 - r1*r2
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(QuotientRemainder, test) {
   EXPECT(test != NULL);
   if (TargetCPUFeatures::vfp_supported()) {
-    typedef int64_t (*QuotientRemainder)(int64_t dividend, int64_t divisor);
+    typedef int64_t (*QuotientRemainder)
+        (int64_t dividend, int64_t divisor) DART_UNUSED;
     EXPECT_EQ(0x1000400000da8LL,
               EXECUTE_TEST_CODE_INT64_LL(QuotientRemainder, test->entry(),
                                          0x12345678, 0x1234));
   } else {
-    typedef int (*QuotientRemainder)();
+    typedef int (*QuotientRemainder)() DART_UNUSED;
     EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(QuotientRemainder, test->entry()));
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(Multiply64To64, assembler) {
 #if defined(USING_SIMULATOR)
   const ARMVersion version = TargetCPUFeatures::arm_version();
   HostCPUFeatures::set_arm_version(ARMv7);
 #endif
@@ skipping 10 matching lines @@
   }
   __ bx(LR);
 #if defined(USING_SIMULATOR)
   HostCPUFeatures::set_arm_version(version);
 #endif
 }
 
 
 ASSEMBLER_TEST_RUN(Multiply64To64, test) {
   EXPECT(test != NULL);
-  typedef int64_t (*Multiply64To64)(int64_t operand0, int64_t operand1);
+  typedef int64_t (*Multiply64To64)
+      (int64_t operand0, int64_t operand1) DART_UNUSED;
   EXPECT_EQ(6,
             EXECUTE_TEST_CODE_INT64_LL(Multiply64To64, test->entry(), -3, -2));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Multiply32To64, assembler) {
 #if defined(USING_SIMULATOR)
   const ARMVersion version = TargetCPUFeatures::arm_version();
   HostCPUFeatures::set_arm_version(ARMv7);
 #endif
   if (TargetCPUFeatures::arm_version() == ARMv7) {
     __ smull(R0, R1, R0, R2);
   } else {
     __ LoadImmediate(R0, 6);
   }
   __ bx(LR);
 #if defined(USING_SIMULATOR)
   HostCPUFeatures::set_arm_version(version);
 #endif
 }
 
 
 ASSEMBLER_TEST_RUN(Multiply32To64, test) {
   EXPECT(test != NULL);
-  typedef int64_t (*Multiply32To64)(int64_t operand0, int64_t operand1);
+  typedef int64_t (*Multiply32To64)
+      (int64_t operand0, int64_t operand1) DART_UNUSED;
   EXPECT_EQ(6,
             EXECUTE_TEST_CODE_INT64_LL(Multiply32To64, test->entry(), -3, -2));
 }
 
 
 ASSEMBLER_TEST_GENERATE(MultiplyAccum32To64, assembler) {
 #if defined(USING_SIMULATOR)
   const ARMVersion version = TargetCPUFeatures::arm_version();
   HostCPUFeatures::set_arm_version(ARMv7);
 #endif
   if (TargetCPUFeatures::arm_version() == ARMv7) {
     __ smlal(R0, R1, R0, R2);
   } else {
     __ LoadImmediate(R0, 3);
   }
   __ bx(LR);
 #if defined(USING_SIMULATOR)
   HostCPUFeatures::set_arm_version(version);
 #endif
 }
 
 
 ASSEMBLER_TEST_RUN(MultiplyAccum32To64, test) {
   EXPECT(test != NULL);
-  typedef int64_t (*Multiply32To64)(int64_t operand0, int64_t operand1);
+  typedef int64_t (*Multiply32To64)
+      (int64_t operand0, int64_t operand1) DART_UNUSED;
   EXPECT_EQ(3,
             EXECUTE_TEST_CODE_INT64_LL(Multiply32To64, test->entry(), -3, -2));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Clz, assembler) {
   Label error;
 
   __ mov(R0, Operand(0));
   __ clz(R1, R0);
@@ skipping 14 matching lines @@
   __ mov(R0, Operand(0));
   __ bx(LR);
   __ Bind(&error);
   __ mov(R0, Operand(1));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Clz, test) {
   EXPECT(test != NULL);
-  typedef int (*Clz)();
+  typedef int (*Clz)() DART_UNUSED;
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Clz, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Tst, assembler) {
   Label skip;
 
   __ mov(R0, Operand(42));
   __ mov(R1, Operand(40));
   __ tst(R1, Operand(0));
   __ b(&skip, NE);
   __ mov(R0, Operand(0));
   __ Bind(&skip);
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Tst, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Lsl, assembler) {
   Label skip;
 
   __ mov(R0, Operand(1));
   __ mov(R0, Operand(R0, LSL, 1));
   __ mov(R1, Operand(1));
   __ mov(R0, Operand(R0, LSL, R1));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Lsl, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Lsr, assembler) {
   Label skip;
 
   __ mov(R0, Operand(4));
   __ mov(R0, Operand(R0, LSR, 1));
   __ mov(R1, Operand(1));
   __ mov(R0, Operand(R0, LSR, R1));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Lsr, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Lsr1, assembler) {
   Label skip;
 
   __ mov(R0, Operand(1));
   __ Lsl(R0, R0, 31);
   __ Lsr(R0, R0, 31);
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Lsr1, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Asr1, assembler) {
   Label skip;
 
   __ mov(R0, Operand(1));
   __ Lsl(R0, R0, 31);
   __ Asr(R0, R0, 31);
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Asr1, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Rsb, assembler) {
   __ mov(R3, Operand(10));
   __ rsb(R0, R3, Operand(42));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Rsb, test) {
   EXPECT(test != NULL);
-  typedef int (*Rsb)();
+  typedef int (*Rsb)() DART_UNUSED;
   EXPECT_EQ(32, EXECUTE_TEST_CODE_INT32(Rsb, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Ldrh, assembler) {
   Label Test1, Test2, Test3, Done;
 
   __ mov(R1, Operand(0x11));
   __ mov(R2, Operand(SP));
   __ str(R1, Address(SP, (-kWordSize * 30), Address::PreIndex));
@@ skipping 25 matching lines @@
 
   __ mov(R0, Operand(0));
   __ Bind(&Done);
   __ ldr(R1, Address(SP, (kWordSize * 30), Address::PostIndex));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Ldrh, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Ldrsb, assembler) {
   __ mov(R1, Operand(0xFF));
   __ mov(R2, Operand(SP));
   __ str(R1, Address(SP, (-kWordSize * 30), Address::PreIndex));
   __ ldrsb(R0, Address(R2, (-kWordSize * 30)));
   __ ldr(R1, Address(SP, (kWordSize * 30), Address::PostIndex));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Ldrsb, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Ldrb, assembler) {
   __ mov(R1, Operand(0xFF));
   __ mov(R2, Operand(SP));
   __ str(R1, Address(SP, (-kWordSize * 30), Address::PreIndex));
   __ ldrb(R0, Address(R2, (-kWordSize * 30)));
   __ ldr(R1, Address(SP, (kWordSize * 30), Address::PostIndex));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Ldrb, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(0xff, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Ldrsh, assembler) {
   __ mov(R1, Operand(0xFF));
   __ mov(R2, Operand(SP));
   __ str(R1, Address(SP, (-kWordSize * 30), Address::PreIndex));
   __ ldrsh(R0, Address(R2, (-kWordSize * 30)));
   __ ldr(R1, Address(SP, (kWordSize * 30), Address::PostIndex));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Ldrsh, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(0xff, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Ldrh1, assembler) {
   __ mov(R1, Operand(0xFF));
   __ mov(R2, Operand(SP));
   __ str(R1, Address(SP, (-kWordSize * 30), Address::PreIndex));
   __ ldrh(R0, Address(R2, (-kWordSize * 30)));
   __ ldr(R1, Address(SP, (kWordSize * 30), Address::PostIndex));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Ldrh1, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(0xff, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Ldrd, assembler) {
   __ mov(IP, Operand(SP));
   __ strd(R2, Address(SP, (-kWordSize * 30), Address::PreIndex));
   __ strd(R0, Address(IP, (-kWordSize * 28)));
   __ ldrd(R2, Address(IP, (-kWordSize * 28)));
   __ ldrd(R0, Address(SP, (kWordSize * 30), Address::PostIndex));
   __ sub(R0, R0, Operand(R2));
   __ add(R1, R1, Operand(R3));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Ldrd, test) {
   EXPECT(test != NULL);
-  typedef int64_t (*Tst)(int64_t r0r1, int64_t r2r3);
+  typedef int64_t (*Tst)(int64_t r0r1, int64_t r2r3) DART_UNUSED;
   EXPECT_EQ(0x0000444400002222LL, EXECUTE_TEST_CODE_INT64_LL(
       Tst, test->entry(), 0x0000111100000000LL, 0x0000333300002222LL));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Ldm_stm_da, assembler) {
   __ mov(R0, Operand(1));
   __ mov(R1, Operand(7));
   __ mov(R2, Operand(11));
   __ mov(R3, Operand(31));
@@ skipping 23 matching lines @@
   __ Pop(R5);  // Restore R5.
   __ Pop(R5);  // Restore R5.
   __ Pop(R5);  // Restore R5.
   __ Pop(R5);  // Restore R5.
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Ldm_stm_da, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-52, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(AddressShiftStrLSL1NegOffset, assembler) {
   __ mov(R2, Operand(42));
   __ mov(R1, Operand(kWordSize));
   __ str(R2, Address(SP, R1, LSL, 1, Address::NegOffset));
   __ ldr(R0, Address(SP, (-kWordSize * 2), Address::Offset));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(AddressShiftStrLSL1NegOffset, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(AddressShiftLdrLSL5NegOffset, assembler) {
   __ mov(R2, Operand(42));
   __ mov(R1, Operand(kWordSize));
   __ str(R2, Address(SP, (-kWordSize * 32), Address::Offset));
   __ ldr(R0, Address(SP, R1, LSL, 5, Address::NegOffset));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(AddressShiftLdrLSL5NegOffset, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(AddressShiftStrLRS1NegOffset, assembler) {
   __ mov(R2, Operand(42));
   __ mov(R1, Operand(kWordSize * 2));
   __ str(R2, Address(SP, R1, LSR, 1, Address::NegOffset));
   __ ldr(R0, Address(SP, -kWordSize, Address::Offset));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(AddressShiftStrLRS1NegOffset, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(AddressShiftLdrLRS1NegOffset, assembler) {
   __ mov(R2, Operand(42));
   __ mov(R1, Operand(kWordSize * 2));
   __ str(R2, Address(SP, -kWordSize, Address::Offset));
   __ ldr(R0, Address(SP, R1, LSR, 1, Address::NegOffset));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(AddressShiftLdrLRS1NegOffset, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(AddressShiftStrLSLNegPreIndex, assembler) {
   __ mov(R2, Operand(42));
   __ mov(R1, Operand(kWordSize));
   __ mov(R3, Operand(SP));
   __ str(R2, Address(SP, R1, LSL, 5, Address::NegPreIndex));
   __ ldr(R0, Address(R3, (-kWordSize * 32), Address::Offset));
   __ mov(SP, Operand(R3));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(AddressShiftStrLSLNegPreIndex, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(AddressShiftLdrLSLNegPreIndex, assembler) {
   __ mov(R2, Operand(42));
   __ mov(R1, Operand(kWordSize));
   __ str(R2, Address(SP, (-kWordSize * 32), Address::PreIndex));
   __ ldr(R0, Address(SP, R1, LSL, 5, Address::PostIndex));
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(AddressShiftLdrLSLNegPreIndex, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 // Make sure we can store and reload the D registers using vstmd and vldmd
 ASSEMBLER_TEST_GENERATE(VstmdVldmd, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ LoadDImmediate(D0, 0.0, R0);
     __ LoadDImmediate(D1, 1.0, R0);
     __ LoadDImmediate(D2, 2.0, R0);
@@ skipping 36 matching lines @@
     __ mov(R0, Operand(0), NE);  // Put failure into R0 if NE
   } else {
     __ LoadImmediate(R0, 42);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(VstmdVldmd, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 // Make sure we can store and reload the S registers using vstms and vldms
 ASSEMBLER_TEST_GENERATE(VstmsVldms, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ LoadSImmediate(S0, 0.0);
     __ LoadSImmediate(S1, 1.0);
     __ LoadSImmediate(S2, 2.0);
@@ skipping 35 matching lines @@
     __ mov(R0, Operand(0), NE);  // Put failure value into R0 if NE
   } else {
     __ LoadImmediate(R0, 42);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(VstmsVldms, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 // Make sure we can start somewhere other than D0
 ASSEMBLER_TEST_GENERATE(VstmdVldmd1, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ LoadDImmediate(D1, 1.0, R0);
     __ LoadDImmediate(D2, 2.0, R0);
     __ LoadDImmediate(D3, 3.0, R0);
@@ skipping 34 matching lines @@
     __ mov(R0, Operand(0), NE);  // Put failure into R0 if NE
   } else {
     __ LoadImmediate(R0, 42);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(VstmdVldmd1, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 // Make sure we can start somewhere other than S0
 ASSEMBLER_TEST_GENERATE(VstmsVldms1, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ LoadSImmediate(S1, 1.0);
     __ LoadSImmediate(S2, 2.0);
     __ LoadSImmediate(S3, 3.0);
@@ skipping 33 matching lines @@
     __ mov(R0, Operand(0), NE);  // Put failure value into R0 if NE
   } else {
     __ LoadImmediate(R0, 42);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(VstmsVldms1, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 // Make sure we can store the D registers using vstmd and
 // load them into a different set using vldmd
 ASSEMBLER_TEST_GENERATE(VstmdVldmd_off, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     // Save used callee-saved FPU registers.
     __ vstmd(DB_W, SP, D8, 3);
@@ skipping 44 matching lines @@
     __ vldmd(IA_W, SP, D8, 3);
   } else {
     __ LoadImmediate(R0, 42);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(VstmdVldmd_off, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 // Make sure we can start somewhere other than S0
 ASSEMBLER_TEST_GENERATE(VstmsVldms_off, assembler) {
   if (TargetCPUFeatures::vfp_supported()) {
     __ LoadSImmediate(S0, 0.0);
     __ LoadSImmediate(S1, 1.0);
     __ LoadSImmediate(S2, 2.0);
@@ skipping 37 matching lines @@
     __ mov(R0, Operand(0), NE);  // Put failure value into R0 if NE
   } else {
     __ LoadImmediate(R0, 42);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(VstmsVldms_off, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Udiv, assembler) {
   if (TargetCPUFeatures::integer_division_supported()) {
     __ mov(R0, Operand(27));
     __ mov(R1, Operand(9));
     __ udiv(R2, R0, R1);
     __ mov(R0, Operand(R2));
   } else {
     __ mov(R0, Operand(3));
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Udiv, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Sdiv, assembler) {
   if (TargetCPUFeatures::integer_division_supported()) {
     __ mov(R0, Operand(27));
     __ LoadImmediate(R1, -9);
     __ sdiv(R2, R0, R1);
     __ mov(R0, Operand(R2));
   } else {
     __ LoadImmediate(R0, -3);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Sdiv, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Udiv_zero, assembler) {
   if (TargetCPUFeatures::integer_division_supported()) {
     __ mov(R0, Operand(27));
     __ mov(R1, Operand(0));
     __ udiv(R2, R0, R1);
     __ mov(R0, Operand(R2));
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Udiv_zero, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Sdiv_zero, assembler) {
   if (TargetCPUFeatures::integer_division_supported()) {
     __ mov(R0, Operand(27));
     __ mov(R1, Operand(0));
     __ sdiv(R2, R0, R1);
     __ mov(R0, Operand(R2));
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Sdiv_zero, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Udiv_corner, assembler) {
   if (TargetCPUFeatures::integer_division_supported()) {
     __ LoadImmediate(R0, 0x80000000);
     __ LoadImmediate(R1, 0xffffffff);
     __ udiv(R2, R0, R1);
     __ mov(R0, Operand(R2));
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Udiv_corner, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Sdiv_corner, assembler) {
   if (TargetCPUFeatures::integer_division_supported()) {
     __ LoadImmediate(R0, 0x80000000);
     __ LoadImmediate(R1, 0xffffffff);
     __ sdiv(R2, R0, R1);
     __ mov(R0, Operand(R2));
   } else {
     __ LoadImmediate(R0, 0x80000000);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Sdiv_corner, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(static_cast<int32_t>(0x80000000),
             EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(IntDiv_supported, assembler) {
 #if defined(USING_SIMULATOR)
   bool orig = TargetCPUFeatures::integer_division_supported();
   HostCPUFeatures::set_integer_division_supported(true);
   __ mov(R0, Operand(27));
   __ mov(R1, Operand(9));
   __ IntegerDivide(R0, R0, R1, D0, D1);
   HostCPUFeatures::set_integer_division_supported(orig);
   __ bx(LR);
 #else
   __ mov(R0, Operand(27));
   __ mov(R1, Operand(9));
   __ IntegerDivide(R0, R0, R1, D0, D1);
   __ bx(LR);
 #endif
 }
 
 
 ASSEMBLER_TEST_RUN(IntDiv_supported, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(IntDiv_unsupported, assembler) {
 #if defined(USING_SIMULATOR)
   bool orig = TargetCPUFeatures::integer_division_supported();
   HostCPUFeatures::set_integer_division_supported(false);
   __ mov(R0, Operand(27));
   __ mov(R1, Operand(9));
   __ IntegerDivide(R0, R0, R1, D0, D1);
   HostCPUFeatures::set_integer_division_supported(orig);
   __ bx(LR);
 #else
   __ mov(R0, Operand(27));
   __ mov(R1, Operand(9));
   __ IntegerDivide(R0, R0, R1, D0, D1);
   __ bx(LR);
 #endif
 }
 
 
 ASSEMBLER_TEST_RUN(IntDiv_unsupported, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Muls, assembler) {
   __ mov(R0, Operand(3));
   __ LoadImmediate(R1, -9);
   __ muls(R2, R0, R1);
   __ mov(R0, Operand(42), MI);
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Muls, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vaddqi8, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
     __ vmovsr(S1, R0);
@@ skipping 23 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 36);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vaddqi8, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(36, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vaddqi16, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
     __ vmovsr(S1, R0);
@@ skipping 23 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 36);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vaddqi16, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(36, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vaddqi32, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
     __ vmovsr(S1, R0);
@@ skipping 23 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 36);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vaddqi32, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(36, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vaddqi64, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
     __ vmovsr(S2, R0);
@@ skipping 11 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 10);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vaddqi64, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vshlqu64, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     Label fail;
     __ LoadImmediate(R1, 21);
     __ LoadImmediate(R0, 1);
     __ vmovsr(S0, R1);
@@ skipping 17 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 1);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vshlqu64, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vshlqi64, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     Label fail;
     __ LoadImmediate(R1, -84);
     __ LoadImmediate(R0, -1);
     __ vmovdrr(D0, R1, R0);
@@ skipping 17 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 1);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vshlqi64, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Mint_shl_ok, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     const QRegister value = Q0;
     const QRegister temp = Q1;
     const QRegister out = Q2;
     const Register shift = R1;
@@ skipping 36 matching lines @@
     __ LoadImmediate(R0, 0);
   } else {
     __ LoadImmediate(R0, 1);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Mint_shl_ok, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Mint_shl_overflow, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     const QRegister value = Q0;
     const QRegister temp = Q1;
     const QRegister out = Q2;
     const Register shift = R1;
@@ skipping 36 matching lines @@
     __ LoadImmediate(R0, 1);
   } else {
     __ LoadImmediate(R0, 1);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Mint_shl_overflow, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vsubqi8, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
     __ vmovsr(S1, R0);
@@ skipping 23 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 10);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vsubqi8, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vsubqi16, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
     __ vmovsr(S1, R0);
@@ skipping 23 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 10);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vsubqi16, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vsubqi32, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
     __ vmovsr(S1, R0);
@@ skipping 23 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 10);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vsubqi32, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vsubqi64, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
     __ vmovsr(S2, R0);
@@ skipping 11 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 3);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vsubqi64, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vmulqi8, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
     __ vmovsr(S1, R0);
@@ skipping 23 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 70);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vmulqi8, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(70, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vmulqi16, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
     __ vmovsr(S1, R0);
@@ skipping 23 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 70);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vmulqi16, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(70, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vmulqi32, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
     __ vmovsr(S1, R0);
@@ skipping 23 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 70);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vmulqi32, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(70, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vaddqs, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 1.0);
     __ LoadSImmediate(S1, 2.0);
     __ LoadSImmediate(S2, 3.0);
     __ LoadSImmediate(S3, 4.0);
@@ skipping 14 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 36);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vaddqs, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(36, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vsubqs, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 1.0);
     __ LoadSImmediate(S1, 2.0);
     __ LoadSImmediate(S2, 3.0);
     __ LoadSImmediate(S3, 4.0);
@@ skipping 14 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 10);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vsubqs, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vmulqs, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 1.0);
     __ LoadSImmediate(S1, 2.0);
     __ LoadSImmediate(S2, 3.0);
     __ LoadSImmediate(S3, 4.0);
@@ skipping 14 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 70);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vmulqs, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(70, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(VtblX, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     // Index.
     __ LoadImmediate(R0, 0x03020100);
     __ vmovsr(S0, R0);
     __ vmovsr(S1, R0);
@@ skipping 22 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 42);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(VtblX, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(VtblY, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     // Index.
     __ LoadImmediate(R0, 0x07060504);
     __ vmovsr(S0, R0);
     __ vmovsr(S1, R0);
@@ skipping 22 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 42);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(VtblY, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(VtblZ, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     // Index.
     __ LoadImmediate(R0, 0x0b0a0908);
     __ vmovsr(S0, R0);
     __ vmovsr(S1, R0);
@@ skipping 22 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 42);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(VtblZ, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(VtblW, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     // Index.
     __ LoadImmediate(R0, 0x0f0e0d0c);
     __ vmovsr(S0, R0);
     __ vmovsr(S1, R0);
@@ skipping 22 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 42);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(VtblW, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Veorq, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     // Q0
     __ LoadImmediate(R0, 0xaaaaaaab);
     __ vmovsr(S0, R0);
     __ vmovsr(S1, R0);
@@ skipping 21 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, -8);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Veorq, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-8, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vornq, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     // Q0
     __ LoadImmediate(R0, 0xfffffff0);
     __ vmovsr(S0, R0);
     __ vmovsr(S1, R0);
@@ skipping 21 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 60);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vornq, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(60, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vorrq, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     // Q0
     __ LoadImmediate(R0, 0xaaaaaaaa);
     __ vmovsr(S0, R0);
     __ vmovsr(S1, R0);
@@ skipping 21 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, -4);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vorrq, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vandq, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     // Q0
     __ LoadImmediate(R0, 0xaaaaaaab);
     __ vmovsr(S0, R0);
     __ vmovsr(S1, R0);
@@ skipping 21 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 4);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vandq, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vmovq, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     // Q0
     __ LoadSImmediate(S0, 1.0);
     __ vmovs(S1, S0);
     __ vmovs(S2, S0);
@@ skipping 17 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 4);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vmovq, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vmvnq, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadImmediate(R1, 42);  // R1 <- 42.
     __ vmovsr(S2, R1);  // S2 <- R1.
     __ vmvnq(Q1, Q0);  // Q1 <- ~Q0.
     __ vmvnq(Q2, Q1);  // Q2 <- ~Q1.
     __ vmovrs(R0, S10);  // Now R0 should be 42 again.
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 42);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vmvnq, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vdupb, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadImmediate(R0, 0x00000000);
     __ LoadImmediate(R1, 0x00ff0000);
     __ vmovsr(S4, R0);
     __ vmovsr(S5, R1);
@@ skipping 12 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, -4);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vdupb, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vduph, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadImmediate(R0, 0xffff0000);
     __ LoadImmediate(R1, 0x00000000);
     __ vmovsr(S4, R0);
     __ vmovsr(S5, R1);
@@ skipping 12 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, -4);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vduph, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vdupw, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadImmediate(R0, 0x00000000);
     __ LoadImmediate(R1, 0xffffffff);
     __ vmovsr(S4, R0);
     __ vmovsr(S5, R1);
@@ skipping 12 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, -4);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vdupw, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vzipqw, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 0.0);
     __ LoadSImmediate(S1, 1.0);
     __ LoadSImmediate(S2, 2.0);
     __ LoadSImmediate(S3, 3.0);
@@ skipping 12 matching lines @@
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, 8.0);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vzipqw, test) {
   EXPECT(test != NULL);
-  typedef float (*Vzipqw)();
+  typedef float (*Vzipqw)() DART_UNUSED;
   float res = EXECUTE_TEST_CODE_FLOAT(Vzipqw, test->entry());
   EXPECT_FLOAT_EQ(8.0, res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vceqqi32, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
@@ skipping 24 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, -2);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vceqqi32, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vceqqs, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 1.0);
     __ LoadSImmediate(S1, 2.0);
     __ LoadSImmediate(S2, 3.0);
     __ LoadSImmediate(S3, 4.0);
@@ skipping 15 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, -2);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vceqqs, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vcgeqi32, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
     __ vmovsr(S1, R0);
@@ skipping 23 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, -2);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vcgeqi32, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vcugeqi32, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
     __ vmovsr(S1, R0);
@@ skipping 23 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, -2);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vcugeqi32, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vcgeqs, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 1.0);
     __ LoadSImmediate(S1, 2.0);
     __ LoadSImmediate(S2, 3.0);
     __ LoadSImmediate(S3, 4.0);
@@ skipping 15 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, -2);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vcgeqs, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vcgtqi32, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
     __ vmovsr(S1, R0);
@@ skipping 23 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, -2);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vcgtqi32, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vcugtqi32, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, Operand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, Operand(2));
     __ vmovsr(S1, R0);
@@ skipping 23 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, -2);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vcugtqi32, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vcgtqs, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 1.0);
     __ LoadSImmediate(S1, 2.0);
     __ LoadSImmediate(S2, 3.0);
     __ LoadSImmediate(S3, 4.0);
@@ skipping 15 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, -2);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vcgtqs, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vminqs, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 1.0);
     __ LoadSImmediate(S1, 2.0);
     __ LoadSImmediate(S2, 3.0);
     __ LoadSImmediate(S3, 4.0);
@@ skipping 14 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 8);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vminqs, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(8, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vmaxqs, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 1.0);
     __ LoadSImmediate(S1, 2.0);
     __ LoadSImmediate(S2, 3.0);
     __ LoadSImmediate(S3, 4.0);
@@ skipping 14 matching lines @@
     __ bx(LR);
   } else {
     __ LoadImmediate(R0, 14);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vmaxqs, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(14, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 // This is the same function as in the Simulator.
 static float arm_recip_estimate(float a) {
   // From the ARM Architecture Reference Manual A2-85.
   if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
   else if (a == 0.0) return INFINITY;
   else if (isnan(a)) return a;
@@ skipping 38 matching lines @@
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, arm_recip_estimate(147.0));
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vrecpeqs, test) {
   EXPECT(test != NULL);
-  typedef float (*Vrecpeqs)();
+  typedef float (*Vrecpeqs)() DART_UNUSED;
   float res = EXECUTE_TEST_CODE_FLOAT(Vrecpeqs, test->entry());
   EXPECT_FLOAT_EQ(arm_recip_estimate(147.0), res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vrecpsqs, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 5.0);
     __ LoadSImmediate(S5, 2.0);
     __ LoadSImmediate(S6, 3.0);
     __ LoadSImmediate(S7, 4.0);
 
     __ LoadSImmediate(S8, 10.0);
     __ LoadSImmediate(S9, 1.0);
     __ LoadSImmediate(S10, 6.0);
     __ LoadSImmediate(S11, 3.0);
 
     __ vrecpsqs(Q0, Q1, Q2);
 
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, 2.0 - 10.0 * 5.0);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vrecpsqs, test) {
   EXPECT(test != NULL);
-  typedef float (*Vrecpsqs)();
+  typedef float (*Vrecpsqs)() DART_UNUSED;
   float res = EXECUTE_TEST_CODE_FLOAT(Vrecpsqs, test->entry());
   EXPECT_FLOAT_EQ(2.0 - 10.0 * 5.0, res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Reciprocal, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 147000.0);
     __ vmovs(S5, S4);
     __ vmovs(S6, S4);
@@ skipping 10 matching lines @@
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, 1.0/147000.0);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Reciprocal, test) {
   EXPECT(test != NULL);
-  typedef float (*Reciprocal)();
+  typedef float (*Reciprocal)() DART_UNUSED;
   float res = EXECUTE_TEST_CODE_FLOAT(Reciprocal, test->entry());
   EXPECT_FLOAT_EQ(1.0/147000.0, res, 0.0001f);
 }
 
 
 static float arm_reciprocal_sqrt_estimate(float a) {
   // From the ARM Architecture Reference Manual A2-87.
   if (isinf(a) || (fabs(a) >= exp2f(126))) return 0.0;
   else if (a == 0.0) return INFINITY;
   else if (isnan(a)) return a;
@@ skipping 55 matching lines @@
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, arm_reciprocal_sqrt_estimate(147.0));
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vrsqrteqs, test) {
   EXPECT(test != NULL);
-  typedef float (*Vrsqrteqs)();
+  typedef float (*Vrsqrteqs)() DART_UNUSED;
   float res = EXECUTE_TEST_CODE_FLOAT(Vrsqrteqs, test->entry());
   EXPECT_FLOAT_EQ(arm_reciprocal_sqrt_estimate(147.0), res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vrsqrtsqs, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 5.0);
     __ LoadSImmediate(S5, 2.0);
     __ LoadSImmediate(S6, 3.0);
     __ LoadSImmediate(S7, 4.0);
 
     __ LoadSImmediate(S8, 10.0);
     __ LoadSImmediate(S9, 1.0);
     __ LoadSImmediate(S10, 6.0);
     __ LoadSImmediate(S11, 3.0);
 
     __ vrsqrtsqs(Q0, Q1, Q2);
 
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, (3.0 - 10.0 * 5.0) / 2.0);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vrsqrtsqs, test) {
   EXPECT(test != NULL);
-  typedef float (*Vrsqrtsqs)();
+  typedef float (*Vrsqrtsqs)() DART_UNUSED;
   float res = EXECUTE_TEST_CODE_FLOAT(Vrsqrtsqs, test->entry());
   EXPECT_FLOAT_EQ((3.0 - 10.0 * 5.0)/2.0, res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(ReciprocalSqrt, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 147000.0);
     __ vmovs(S5, S4);
     __ vmovs(S6, S4);
@@ skipping 14 matching lines @@
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, 1.0/sqrt(147000.0));
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(ReciprocalSqrt, test) {
   EXPECT(test != NULL);
-  typedef float (*ReciprocalSqrt)();
+  typedef float (*ReciprocalSqrt)() DART_UNUSED;
   float res = EXECUTE_TEST_CODE_FLOAT(ReciprocalSqrt, test->entry());
   EXPECT_FLOAT_EQ(1.0/sqrt(147000.0), res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(SIMDSqrt, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 147000.0);
     __ vmovs(S5, S4);
     __ vmovs(S6, S4);
@@ skipping 24 matching lines @@
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, sqrt(147000.0));
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(SIMDSqrt, test) {
   EXPECT(test != NULL);
-  typedef float (*SIMDSqrt)();
+  typedef float (*SIMDSqrt)() DART_UNUSED;
   float res = EXECUTE_TEST_CODE_FLOAT(SIMDSqrt, test->entry());
   EXPECT_FLOAT_EQ(sqrt(147000.0), res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(SIMDSqrt2, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 1.0);
     __ LoadSImmediate(S5, 4.0);
     __ LoadSImmediate(S6, 9.0);
@@ skipping 28 matching lines @@
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, 10.0);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(SIMDSqrt2, test) {
   EXPECT(test != NULL);
-  typedef float (*SIMDSqrt2)();
+  typedef float (*SIMDSqrt2)() DART_UNUSED;
   float res = EXECUTE_TEST_CODE_FLOAT(SIMDSqrt2, test->entry());
   EXPECT_FLOAT_EQ(10.0, res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(SIMDDiv, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 1.0);
     __ LoadSImmediate(S5, 4.0);
     __ LoadSImmediate(S6, 9.0);
@@ skipping 20 matching lines @@
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, 16.0);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(SIMDDiv, test) {
   EXPECT(test != NULL);
-  typedef float (*SIMDDiv)();
+  typedef float (*SIMDDiv)() DART_UNUSED;
   float res = EXECUTE_TEST_CODE_FLOAT(SIMDDiv, test->entry());
   EXPECT_FLOAT_EQ(16.0, res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vabsqs, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 1.0);
     __ LoadSImmediate(S5, -1.0);
     __ LoadSImmediate(S6, 1.0);
     __ LoadSImmediate(S7, -1.0);
 
     __ vabsqs(Q0, Q1);
 
     __ vadds(S0, S0, S1);
     __ vadds(S0, S0, S2);
     __ vadds(S0, S0, S3);
 
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, 4.0);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vabsqs, test) {
   EXPECT(test != NULL);
-  typedef float (*Vabsqs)();
+  typedef float (*Vabsqs)() DART_UNUSED;
   float res = EXECUTE_TEST_CODE_FLOAT(Vabsqs, test->entry());
   EXPECT_FLOAT_EQ(4.0, res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vnegqs, assembler) {
   if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 1.0);
     __ LoadSImmediate(S5, -2.0);
     __ LoadSImmediate(S6, 1.0);
     __ LoadSImmediate(S7, -2.0);
 
     __ vnegqs(Q0, Q1);
 
     __ vadds(S0, S0, S1);
     __ vadds(S0, S0, S2);
     __ vadds(S0, S0, S3);
 
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, 2.0);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vnegqs, test) {
   EXPECT(test != NULL);
-  typedef float (*Vnegqs)();
+  typedef float (*Vnegqs)() DART_UNUSED;
   float res = EXECUTE_TEST_CODE_FLOAT(Vnegqs, test->entry());
   EXPECT_FLOAT_EQ(2.0, res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(MultCheckOverflow, assembler) {
   // Both positive, no overflow
   Label overflow1, test1;
   __ LoadImmediate(R0, 42);
   __ LoadImmediate(R1, 0xff);
@@ skipping 74 matching lines @@
   __ LoadImmediate(R0, 8);
   __ Ret();
 
   __ Bind(&test8);
   __ Ret();
 }
 
 
 ASSEMBLER_TEST_RUN(MultCheckOverflow, test) {
   EXPECT(test != NULL);
-  typedef int (*Tst)();
+  typedef int (*Tst)() DART_UNUSED;
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 // Called from assembler_test.cc.
 // LR: return address.
 // R0: context.
 // R1: value.
 // R2: growable array.
 ASSEMBLER_TEST_GENERATE(StoreIntoObject, assembler) {
   __ PushList((1 << CTX) | (1 << LR));
   __ mov(CTX, Operand(R0));
   __ StoreIntoObject(R2,
                      FieldAddress(R2, GrowableObjectArray::data_offset()),
                      R1);
   __ PopList((1 << CTX) | (1 << LR));
   __ Ret();
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM