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Issue 353553004: Add support for vector types and vector constants. (Closed) Base URL: https://gerrit.chromium.org/gerrit/p/native_client/pnacl-subzero.git@master
Patch Set: Created 6 years, 5 months ago
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1 ; This file tests that vector constants are represented correctly. It
2 ; is not meant to be valid PNaCl IR or to be lowered to assembly.
3
4 ; RUN: %llvm2ice --verbose inst %s | FileCheck %s
5 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s
6 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s
7
8 define <4 x i1> @test_v4i1(i32 %arg) {
9 entry:
10 switch i32 %arg, label %zeros [
11 i32 0, label %intmax
12 i32 1, label %incr
13 i32 2, label %decr
14 i32 3, label %random
15 i32 4, label %alternating
16 ]
17 intmax:
18 ret <4 x i1> <i1 1, i1 1, i1 1, i1 1>
19 incr:
20 ret <4 x i1> <i1 0, i1 1, i1 0, i1 1>
21 decr:
22 ret <4 x i1> <i1 1, i1 0, i1 1, i1 0>
23 random:
24 ret <4 x i1> <i1 0, i1 0, i1 1, i1 0>
25 alternating:
26 ret <4 x i1> <i1 0, i1 1, i1 0, i1 1>
27 zeros:
28 ret <4 x i1> <i1 0, i1 0, i1 0, i1 0>
29 }
30
31 define <8 x i1> @test_v8i1(i32 %arg) {
32 entry:
33 switch i32 %arg, label %zeros [
34 i32 0, label %intmax
35 i32 1, label %incr
36 i32 2, label %decr
37 i32 3, label %random
38 i32 4, label %alternating
39 ]
40 intmax:
41 ret <8 x i1> <i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1>
42 incr:
43 ret <8 x i1> <i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1>
44 decr:
45 ret <8 x i1> <i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0>
46 random:
47 ret <8 x i1> <i1 0, i1 1, i1 0, i1 0, i1 0, i1 1, i1 1, i1 0>
48 alternating:
49 ret <8 x i1> <i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1>
50 zeros:
51 ret <8 x i1> <i1 0, i1 0, i1 0, i1 0, i1 0, i1 0, i1 0, i1 0>
52 }
53
54 define <16 x i1> @test_v16i1(i32 %arg) {
55 entry:
56 switch i32 %arg, label %zeros [
57 i32 0, label %intmax
58 i32 1, label %incr
59 i32 2, label %decr
60 i32 3, label %random
61 i32 4, label %alternating
62 ]
63 intmax:
64 ret <16 x i1> <i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1>
65 incr:
66 ret <16 x i1> <i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1>
67 decr:
68 ret <16 x i1> <i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0>
69 random:
70 ret <16 x i1> <i1 0, i1 1, i1 0, i1 1, i1 1, i1 1, i1 0, i1 0, i1 1, i1 1, i1 1, i1 1, i1 0, i1 0, i1 1, i1 1>
71 alternating:
72 ret <16 x i1> <i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0, i1 1>
73 zeros:
74 ret <16 x i1> <i1 0, i1 0, i1 0, i1 0, i1 0, i1 0, i1 0, i1 0, i1 0, i1 0, i1 0, i1 0, i1 0, i1 0, i1 0, i1 0>
75 }
76
77 define <16 x i8> @test_v16i8(i32 %arg) {
78 entry:
79 switch i32 %arg, label %zeros [
80 i32 0, label %intmax
81 i32 1, label %incr
82 i32 2, label %decr
83 i32 3, label %random
84 i32 4, label %alternating
85 ]
86 intmax:
87 ret <16 x i8> <i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255>
88 incr:
89 ret <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>
90 decr:
91 ret <16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>
92 random:
93 ret <16 x i8> <i8 63, i8 75, i8 126, i8 187, i8 79, i8 241, i8 98, i8 155, i8 251, i8 46, i8 116, i8 100, i8 155, i8 187, i8 165, i8 212>
94 alternating:
95 ret <16 x i8> <i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i 8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255>
96 zeros:
97 ret <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>
98 }
99
100 define <8 x i16> @test_v8i16(i32 %arg) {
101 entry:
102 switch i32 %arg, label %zeros [
103 i32 0, label %intmax
104 i32 1, label %incr
105 i32 2, label %decr
106 i32 3, label %random
107 i32 4, label %alternating
108 ]
109 intmax:
110 ret <8 x i16> <i16 65535, i16 65535, i16 65535, i16 65535, i16 65535, i16 6553 5, i16 65535, i16 65535>
111 incr:
112 ret <8 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>
113 decr:
114 ret <8 x i16> <i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>
115 random:
116 ret <8 x i16> <i16 32306, i16 22920, i16 36561, i16 44370, i16 1518, i16 22922 , i16 26454, i16 29426>
117 alternating:
118 ret <8 x i16> <i16 0, i16 65535, i16 0, i16 65535, i16 0, i16 65535, i16 0, i1 6 65535>
119 zeros:
120 ret <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>
121 }
122
123 define <4 x i32> @test_v4i32(i32 %arg) {
124 entry:
125 switch i32 %arg, label %zeros [
126 i32 0, label %intmax
127 i32 1, label %incr
128 i32 2, label %decr
129 i32 3, label %random
130 i32 4, label %alternating
131 ]
132 intmax:
133 ret <4 x i32> <i32 4294967295, i32 4294967295, i32 4294967295, i32 4294967295>
134 incr:
135 ret <4 x i32> <i32 0, i32 1, i32 2, i32 3>
136 decr:
137 ret <4 x i32> <i32 3, i32 2, i32 1, i32 0>
138 random:
139 ret <4 x i32> <i32 3639884198, i32 2963421555, i32 3743370439, i32 2521435933>
140 alternating:
141 ret <4 x i32> <i32 0, i32 4294967295, i32 0, i32 4294967295>
142 zeros:
143 ret <4 x i32> <i32 0, i32 0, i32 0, i32 0>
144 }
145
146 ; The CHECK lines are in this function because szdiff ignores lines
147 ; containing float constants.
148 define <4 x float> @test_v4f32(i32 %arg) {
149 entry:
150 switch i32 %arg, label %zeros [
151 i32 0, label %extremes
152 i32 1, label %incr
153 i32 2, label %decr
154 i32 3, label %random
155 i32 5, label %nan
156 i32 6, label %negzero
157 ]
158 extremes:
159 ret <4 x float> <float 0x7FF0000000000000, float 0x47EFFFFFE0000000, float 0x3 810000000000000, float 0xFFF0000000000000>
160 ; CHECK: ret <4 x float> <float inf, float 3.402823e+38, float 1.175494e-38, fl oat -inf>
161 incr:
162 ret <4 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, f loat 4.000000e+00>
163 ; CHECK: ret <4 x float> <float 1.000000e+00, float 2.000000e+00, float 3.00000 0e+00, float 4.000000e+00>
164 decr:
165 ret <4 x float> <float 4.000000e+00, float 3.000000e+00, float 2.000000e+00, f loat 1.000000e+00>
166 ; CHECK: ret <4 x float> <float 4.000000e+00, float 3.000000e+00, float 2.00000 0e+00, float 1.000000e+00>
167 random:
168 ret <4 x float> <float 1.500000e+00, float 4.250000e+00, float -1.562500e-02, float -3.209375e+01>
169 ; CHECK: ret <4 x float> <float 1.500000e+00, float 4.250000e+00, float -1.5625 00e-02, float -3.209375e+01>
170 nan:
171 ret <4 x float> <float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7 FF8000000000000, float 0x7FF8000000000000>
172 ; CHECK: ret <4 x float> <float nan, float nan, float nan, float nan>
173 negzero:
174 ret <4 x float> <float 0.000000e+00, float -0.000000e+00, float 0.000000e+00, float 0.000000e+00>
175 ; CHECK: ret <4 x float> <float 0.000000e+00, float -0.000000e+00, float 0.0000 00e+00, float 0.000000e+00>
176 zeros:
177 ret <4 x float> <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, f loat 0.000000e+00>
178 ; CHECK: ret <4 x float> <float 0.000000e+00, float 0.000000e+00, float 0.00000 0e+00, float 0.000000e+00>
179 }
180
181 ; ERRORS-NOT: ICE translation error
182 ; DUMP-NOT: SZ
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