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Side by Side Diff: runtime/vm/simulator_mips.cc

Issue 353403004: Fixes Android build by using C++ math header instead of C one. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 5 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include <math.h> // for isnan.
6 #include <setjmp.h> 5 #include <setjmp.h>
7 #include <stdlib.h> 6 #include <stdlib.h>
8 7
9 #include "vm/globals.h" 8 #include "vm/globals.h"
10 #if defined(TARGET_ARCH_MIPS) 9 #if defined(TARGET_ARCH_MIPS)
11 10
12 // Only build the simulator if not compiling for real MIPS hardware. 11 // Only build the simulator if not compiling for real MIPS hardware.
13 #if !defined(HOST_ARCH_MIPS) 12 #if !defined(HOST_ARCH_MIPS)
14 13
15 #include "vm/simulator.h" 14 #include "vm/simulator.h"
(...skipping 1570 matching lines...) Expand 10 before | Expand all | Expand 10 after
1586 } 1585 }
1587 case COP1_C_F: { 1586 case COP1_C_F: {
1588 ASSERT(instr->FormatField() == FMT_D); // Only D supported. 1587 ASSERT(instr->FormatField() == FMT_D); // Only D supported.
1589 ASSERT(instr->FdField() == F0); 1588 ASSERT(instr->FdField() == F0);
1590 set_fcsr_bit(fcsr_cc, false); 1589 set_fcsr_bit(fcsr_cc, false);
1591 break; 1590 break;
1592 } 1591 }
1593 case COP1_C_UN: { 1592 case COP1_C_UN: {
1594 ASSERT(instr->FormatField() == FMT_D); // Only D supported. 1593 ASSERT(instr->FormatField() == FMT_D); // Only D supported.
1595 ASSERT(instr->FdField() == F0); 1594 ASSERT(instr->FdField() == F0);
1596 set_fcsr_bit(fcsr_cc, isnan(fs_val) || isnan(ft_val)); 1595 set_fcsr_bit(fcsr_cc, std::isnan(fs_val) || std::isnan(ft_val));
1597 break; 1596 break;
1598 } 1597 }
1599 case COP1_C_EQ: { 1598 case COP1_C_EQ: {
1600 ASSERT(instr->FormatField() == FMT_D); // Only D supported. 1599 ASSERT(instr->FormatField() == FMT_D); // Only D supported.
1601 ASSERT(instr->FdField() == F0); 1600 ASSERT(instr->FdField() == F0);
1602 set_fcsr_bit(fcsr_cc, (fs_val == ft_val)); 1601 set_fcsr_bit(fcsr_cc, (fs_val == ft_val));
1603 break; 1602 break;
1604 } 1603 }
1605 case COP1_C_UEQ: { 1604 case COP1_C_UEQ: {
1606 ASSERT(instr->FormatField() == FMT_D); // Only D supported. 1605 ASSERT(instr->FormatField() == FMT_D); // Only D supported.
1607 ASSERT(instr->FdField() == F0); 1606 ASSERT(instr->FdField() == F0);
1608 set_fcsr_bit(fcsr_cc, 1607 set_fcsr_bit(fcsr_cc,
1609 (fs_val == ft_val) || isnan(fs_val) || isnan(ft_val)); 1608 (fs_val == ft_val) || std::isnan(fs_val) || std::isnan(ft_val));
1610 break; 1609 break;
1611 } 1610 }
1612 case COP1_C_OLT: { 1611 case COP1_C_OLT: {
1613 ASSERT(instr->FormatField() == FMT_D); // Only D supported. 1612 ASSERT(instr->FormatField() == FMT_D); // Only D supported.
1614 ASSERT(instr->FdField() == F0); 1613 ASSERT(instr->FdField() == F0);
1615 set_fcsr_bit(fcsr_cc, (fs_val < ft_val)); 1614 set_fcsr_bit(fcsr_cc, (fs_val < ft_val));
1616 break; 1615 break;
1617 } 1616 }
1618 case COP1_C_ULT: { 1617 case COP1_C_ULT: {
1619 ASSERT(instr->FormatField() == FMT_D); // Only D supported. 1618 ASSERT(instr->FormatField() == FMT_D); // Only D supported.
1620 ASSERT(instr->FdField() == F0); 1619 ASSERT(instr->FdField() == F0);
1621 set_fcsr_bit(fcsr_cc, 1620 set_fcsr_bit(fcsr_cc,
1622 (fs_val < ft_val) || isnan(fs_val) || isnan(ft_val)); 1621 (fs_val < ft_val) || std::isnan(fs_val) || std::isnan(ft_val));
1623 break; 1622 break;
1624 } 1623 }
1625 case COP1_C_OLE: { 1624 case COP1_C_OLE: {
1626 ASSERT(instr->FormatField() == FMT_D); // Only D supported. 1625 ASSERT(instr->FormatField() == FMT_D); // Only D supported.
1627 ASSERT(instr->FdField() == F0); 1626 ASSERT(instr->FdField() == F0);
1628 set_fcsr_bit(fcsr_cc, (fs_val <= ft_val)); 1627 set_fcsr_bit(fcsr_cc, (fs_val <= ft_val));
1629 break; 1628 break;
1630 } 1629 }
1631 case COP1_C_ULE: { 1630 case COP1_C_ULE: {
1632 ASSERT(instr->FormatField() == FMT_D); // Only D supported. 1631 ASSERT(instr->FormatField() == FMT_D); // Only D supported.
1633 ASSERT(instr->FdField() == F0); 1632 ASSERT(instr->FdField() == F0);
1634 set_fcsr_bit(fcsr_cc, 1633 set_fcsr_bit(fcsr_cc,
1635 (fs_val <= ft_val) || isnan(fs_val) || isnan(ft_val)); 1634 (fs_val <= ft_val) || std::isnan(fs_val) || std::isnan(ft_val));
1636 break; 1635 break;
1637 } 1636 }
1638 case COP1_CVT_D: { 1637 case COP1_CVT_D: {
1639 switch (instr->FormatField()) { 1638 switch (instr->FormatField()) {
1640 case FMT_W: { 1639 case FMT_W: {
1641 int32_t fs_int = get_fregister(instr->FsField()); 1640 int32_t fs_int = get_fregister(instr->FsField());
1642 double fs_dbl = static_cast<double>(fs_int); 1641 double fs_dbl = static_cast<double>(fs_int);
1643 set_fregister_double(instr->FdField(), fs_dbl); 1642 set_fregister_double(instr->FdField(), fs_dbl);
1644 break; 1643 break;
1645 } 1644 }
(...skipping 15 matching lines...) Expand all
1661 break; 1660 break;
1662 } 1661 }
1663 } 1662 }
1664 break; 1663 break;
1665 } 1664 }
1666 case COP1_CVT_W: { 1665 case COP1_CVT_W: {
1667 switch (instr->FormatField()) { 1666 switch (instr->FormatField()) {
1668 case FMT_D: { 1667 case FMT_D: {
1669 double fs_dbl = get_fregister_double(instr->FsField()); 1668 double fs_dbl = get_fregister_double(instr->FsField());
1670 int32_t fs_int; 1669 int32_t fs_int;
1671 if (isnan(fs_dbl) || isinf(fs_dbl) || (fs_dbl > INT_MAX) || 1670 if (std::isnan(fs_dbl) || std::isinf(fs_dbl) ||
1672 (fs_dbl < INT_MIN)) { 1671 (fs_dbl > INT_MAX) || (fs_dbl < INT_MIN)) {
1673 fs_int = INT_MIN; 1672 fs_int = INT_MIN;
1674 } else { 1673 } else {
1675 fs_int = static_cast<int32_t>(fs_dbl); 1674 fs_int = static_cast<int32_t>(fs_dbl);
1676 } 1675 }
1677 set_fregister(instr->FdField(), fs_int); 1676 set_fregister(instr->FdField(), fs_int);
1678 break; 1677 break;
1679 } 1678 }
1680 default: { 1679 default: {
1681 OS::PrintErr("DecodeCop1: 0x%x\n", instr->InstructionBits()); 1680 OS::PrintErr("DecodeCop1: 0x%x\n", instr->InstructionBits());
1682 UnimplementedInstruction(instr); 1681 UnimplementedInstruction(instr);
(...skipping 562 matching lines...) Expand 10 before | Expand all | Expand 10 after
2245 set_register(kExceptionObjectReg, bit_cast<int32_t>(raw_exception)); 2244 set_register(kExceptionObjectReg, bit_cast<int32_t>(raw_exception));
2246 set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace)); 2245 set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace));
2247 buf->Longjmp(); 2246 buf->Longjmp();
2248 } 2247 }
2249 2248
2250 } // namespace dart 2249 } // namespace dart
2251 2250
2252 #endif // !defined(HOST_ARCH_MIPS) 2251 #endif // !defined(HOST_ARCH_MIPS)
2253 2252
2254 #endif // defined TARGET_ARCH_MIPS 2253 #endif // defined TARGET_ARCH_MIPS
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