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1 ; This tries to be a comprehensive test of i64 operations, in | 1 ; This tries to be a comprehensive test of i64 operations, in |
2 ; particular the patterns for lowering i64 operations into constituent | 2 ; particular the patterns for lowering i64 operations into constituent |
3 ; i32 operations on x86-32. | 3 ; i32 operations on x86-32. |
4 | 4 |
5 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s | 5 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s |
6 ; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck --check-prefix=OPTM1 %s | 6 ; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck --check-prefix=OPTM1 %s |
7 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s | 7 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s |
8 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s | 8 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s |
9 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \ | 9 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \ |
10 ; RUN: | FileCheck --check-prefix=DUMP %s | 10 ; RUN: | FileCheck --check-prefix=DUMP %s |
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223 ret i64 %div | 223 ret i64 %div |
224 } | 224 } |
225 ; CHECK: div64BitSigned: | 225 ; CHECK: div64BitSigned: |
226 ; CHECK: call __divdi3 | 226 ; CHECK: call __divdi3 |
227 ; CHECK: ret | 227 ; CHECK: ret |
228 ; | 228 ; |
229 ; OPTM1: div64BitSigned: | 229 ; OPTM1: div64BitSigned: |
230 ; OPTM1: call __divdi3 | 230 ; OPTM1: call __divdi3 |
231 ; OPTM1: ret | 231 ; OPTM1: ret |
232 | 232 |
| 233 define internal i64 @div64BitSignedConst(i64 %a) { |
| 234 entry: |
| 235 %div = sdiv i64 %a, 12345678901234 |
| 236 ret i64 %div |
| 237 } |
| 238 ; CHECK-LABEL: div64BitSignedConst: |
| 239 ; CHECK: push 2874 |
| 240 ; CHECK: push 1942892530 |
| 241 ; CHECK: call __divdi3 |
| 242 ; CHECK: ret |
| 243 ; |
| 244 ; OPTM1-LABEL: div64BitSignedConst: |
| 245 ; OPTM1: push 2874 |
| 246 ; OPTM1: push 1942892530 |
| 247 ; OPTM1: call __divdi3 |
| 248 ; OPTM1: ret |
| 249 |
233 define internal i64 @div64BitUnsigned(i64 %a, i64 %b) { | 250 define internal i64 @div64BitUnsigned(i64 %a, i64 %b) { |
234 entry: | 251 entry: |
235 %div = udiv i64 %a, %b | 252 %div = udiv i64 %a, %b |
236 ret i64 %div | 253 ret i64 %div |
237 } | 254 } |
238 ; CHECK: div64BitUnsigned: | 255 ; CHECK: div64BitUnsigned: |
239 ; CHECK: call __udivdi3 | 256 ; CHECK: call __udivdi3 |
240 ; CHECK: ret | 257 ; CHECK: ret |
241 ; | 258 ; |
242 ; OPTM1: div64BitUnsigned: | 259 ; OPTM1: div64BitUnsigned: |
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455 ; CHECK: trunc64To8Signed: | 472 ; CHECK: trunc64To8Signed: |
456 ; CHECK: mov eax, dword ptr [esp+4] | 473 ; CHECK: mov eax, dword ptr [esp+4] |
457 ; CHECK-NEXT: movsx eax, al | 474 ; CHECK-NEXT: movsx eax, al |
458 ; CHECK-NEXT: ret | 475 ; CHECK-NEXT: ret |
459 ; | 476 ; |
460 ; OPTM1: trunc64To8Signed: | 477 ; OPTM1: trunc64To8Signed: |
461 ; OPTM1: mov eax, dword ptr [esp+ | 478 ; OPTM1: mov eax, dword ptr [esp+ |
462 ; OPTM1: movsx eax, | 479 ; OPTM1: movsx eax, |
463 ; OPTM1: ret | 480 ; OPTM1: ret |
464 | 481 |
| 482 define internal i32 @trunc64To32SignedConst() { |
| 483 entry: |
| 484 %conv = trunc i64 12345678901234 to i32 |
| 485 ret i32 %conv |
| 486 } |
| 487 ; CHECK-LABEL: trunc64To32SignedConst |
| 488 ; CHECK: mov eax, 1942892530 |
| 489 ; |
| 490 ; OPTM1-LABEL: trunc64To32SignedConst |
| 491 ; OPTM1: mov eax, 1942892530 |
| 492 |
| 493 define internal i32 @trunc64To16SignedConst() { |
| 494 entry: |
| 495 %conv = trunc i64 12345678901234 to i16 |
| 496 %conv.ret_ext = sext i16 %conv to i32 |
| 497 ret i32 %conv.ret_ext |
| 498 } |
| 499 ; CHECK-LABEL: trunc64To16SignedConst |
| 500 ; CHECK: mov eax, 1942892530 |
| 501 ; CHECK: movsx eax, ax |
| 502 ; |
| 503 ; OPTM1-LABEL: trunc64To16SignedConst |
| 504 ; OPTM1: mov eax, 1942892530 |
| 505 ; OPTM1: movsx eax, |
| 506 |
465 define internal i32 @trunc64To32Unsigned(i64 %a) { | 507 define internal i32 @trunc64To32Unsigned(i64 %a) { |
466 entry: | 508 entry: |
467 %conv = trunc i64 %a to i32 | 509 %conv = trunc i64 %a to i32 |
468 ret i32 %conv | 510 ret i32 %conv |
469 } | 511 } |
470 ; CHECK: trunc64To32Unsigned: | 512 ; CHECK: trunc64To32Unsigned: |
471 ; CHECK: mov eax, dword ptr [esp+4] | 513 ; CHECK: mov eax, dword ptr [esp+4] |
472 ; CHECK-NEXT: ret | 514 ; CHECK-NEXT: ret |
473 ; | 515 ; |
474 ; OPTM1: trunc64To32Unsigned: | 516 ; OPTM1: trunc64To32Unsigned: |
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1154 ; OPTM1: cmp | 1196 ; OPTM1: cmp |
1155 ; OPTM1: jb | 1197 ; OPTM1: jb |
1156 ; OPTM1: ja | 1198 ; OPTM1: ja |
1157 ; OPTM1: cmp | 1199 ; OPTM1: cmp |
1158 ; OPTM1: jb | 1200 ; OPTM1: jb |
1159 ; OPTM1: cmp | 1201 ; OPTM1: cmp |
1160 ; OPTM1: jne | 1202 ; OPTM1: jne |
1161 | 1203 |
1162 ; ERRORS-NOT: ICE translation error | 1204 ; ERRORS-NOT: ICE translation error |
1163 ; DUMP-NOT: SZ | 1205 ; DUMP-NOT: SZ |
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