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Side by Side Diff: src/IceIntrinsics.h

Issue 342763004: Add atomic load/store, fetch_add, fence, and is-lock-free lowering. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: change comment Created 6 years, 6 months ago
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1 //===- subzero/src/IceIntrinsics.h - List of Ice Intrinsics -----*- C++ -*-===// 1 //===- subzero/src/IceIntrinsics.h - List of Ice Intrinsics -----*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file declares the kinds of intrinsics supported by PNaCl. 10 // This file declares the kinds of intrinsics supported by PNaCl.
(...skipping 36 matching lines...) Expand 10 before | Expand all | Expand 10 after
47 Memmove, 47 Memmove,
48 Memset, 48 Memset,
49 NaClReadTP, 49 NaClReadTP,
50 Setjmp, 50 Setjmp,
51 Sqrt, 51 Sqrt,
52 Stacksave, 52 Stacksave,
53 Stackrestore, 53 Stackrestore,
54 Trap 54 Trap
55 }; 55 };
56 56
57 /// Operations that can be represented by the AtomicRMW
58 /// intrinsic.
59 ///
60 /// Do not reorder these values: their order offers forward
61 /// compatibility of bitcode targeted to PNaCl.
62 enum AtomicRMWOperation {
63 AtomicInvalid = 0, // Invalid, keep first.
64 AtomicAdd,
65 AtomicSub,
66 AtomicOr,
67 AtomicAnd,
68 AtomicXor,
69 AtomicExchange,
70 AtomicNum // Invalid, keep last.
71 };
72
73 /// Memory orderings supported by PNaCl IR.
74 ///
75 /// Do not reorder these values: their order offers forward
76 /// compatibility of bitcode targeted to PNaCl.
77 enum MemoryOrder {
78 MemoryOrderInvalid = 0, // Invalid, keep first.
79 MemoryOrderRelaxed,
80 MemoryOrderConsume,
81 MemoryOrderAcquire,
82 MemoryOrderRelease,
83 MemoryOrderAcquireRelease,
84 MemoryOrderSequentiallyConsistent,
85 MemoryOrderNum // Invalid, keep last.
86 };
87
88 static bool VerifyMemoryOrder(uint64_t Order);
89
57 // Basic attributes related to each intrinsic, that are relevant to 90 // Basic attributes related to each intrinsic, that are relevant to
58 // code generation. We will want to have more attributes (e.g., Setjmp 91 // code generation. We will want to have more attributes (e.g., Setjmp
59 // returns twice and which affects stack coloring) once the lowering 92 // returns twice and which affects stack coloring) once the lowering
60 // cares about such attributes. Perhaps the attributes representation 93 // cares about such attributes. Perhaps the attributes representation
61 // can be shared with general function calls, though most functions 94 // can be shared with general function calls, though most functions
62 // will be opaque. 95 // will be opaque.
63 struct IntrinsicInfo { 96 struct IntrinsicInfo {
64 IntrinsicID ID : 31; 97 IntrinsicID ID : 31;
65 bool HasSideEffects : 1; 98 bool HasSideEffects : 1;
66 }; 99 };
(...skipping 18 matching lines...) Expand all
85 typedef std::map<IceString, FullIntrinsicInfo> IntrinsicMap; 118 typedef std::map<IceString, FullIntrinsicInfo> IntrinsicMap;
86 IntrinsicMap map; 119 IntrinsicMap map;
87 120
88 Intrinsics(const Intrinsics &) LLVM_DELETED_FUNCTION; 121 Intrinsics(const Intrinsics &) LLVM_DELETED_FUNCTION;
89 Intrinsics &operator=(const Intrinsics &) LLVM_DELETED_FUNCTION; 122 Intrinsics &operator=(const Intrinsics &) LLVM_DELETED_FUNCTION;
90 }; 123 };
91 124
92 } // end of namespace Ice 125 } // end of namespace Ice
93 126
94 #endif // SUBZERO_SRC_ICEINTRINSICS_H 127 #endif // SUBZERO_SRC_ICEINTRINSICS_H
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