Add atomic load/store, fetch_add, fence, and is-lock-free lowering.

src/IceIntrinsics.cpp

 //===- subzero/src/IceIntrinsics.cpp - Functions related to intrinsics ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the Intrinsics utilities for matching and
@@ skipping 64 matching lines @@
     AtomicRMWInit(IceType_i8, "i8"),
     AtomicRMWInit(IceType_i16, "i16"),
     AtomicRMWInit(IceType_i32, "i32"),
     AtomicRMWInit(IceType_i64, "i64"),
 #undef AtomicRMWInit
 
 #define AtomicStoreInit(Overload, NameSuffix)                                  \
   {                                                                            \
     {                                                                          \
       { Intrinsics::AtomicStore, true }                                        \
-      , { IceType_void, Overload, IceType_i32, IceType_i32 }, 5                \
+      , { IceType_void, Overload, IceType_i32, IceType_i32 }, 4                \
     }                                                                          \
     , "nacl.atomic.store." NameSuffix                                          \
   }
     AtomicStoreInit(IceType_i8, "i8"),
     AtomicStoreInit(IceType_i16, "i16"),
     AtomicStoreInit(IceType_i32, "i32"),
     AtomicStoreInit(IceType_i64, "i64"),
 #undef AtomicStoreInit
 
 #define BswapInit(Overload, NameSuffix)                                        \
@@ skipping 96 matching lines @@
 Intrinsics::~Intrinsics() {}
 
 const Intrinsics::FullIntrinsicInfo *
 Intrinsics::find(const IceString &Name) const {
   IntrinsicMap::const_iterator it = map.find(Name);
   if (it == map.end())
     return NULL;
   return &it->second;
 }
 
+// static
+bool Intrinsics::VerifyMemoryOrder(uint64_t Order) {
+  // There is only one memory ordering for atomics allowed right now.
+  return Order == Intrinsics::MemoryOrderSequentiallyConsistent;
+}
+
 } // end of namespace Ice