| Index: src/arm64/macro-assembler-arm64.cc
|
| diff --git a/src/arm64/macro-assembler-arm64.cc b/src/arm64/macro-assembler-arm64.cc
|
| index ea6b3567e3fd7286f17d06245c0ce4a9d1bc5a93..9eb9496efed67b544010d196601c9654e58f1710 100644
|
| --- a/src/arm64/macro-assembler-arm64.cc
|
| +++ b/src/arm64/macro-assembler-arm64.cc
|
| @@ -64,17 +64,23 @@ void MacroAssembler::LogicalMacro(const Register& rd,
|
| } else if (operand.IsImmediate()) {
|
| int64_t immediate = operand.ImmediateValue();
|
| unsigned reg_size = rd.SizeInBits();
|
| - ASSERT(rd.Is64Bits() || is_uint32(immediate));
|
|
|
| // If the operation is NOT, invert the operation and immediate.
|
| if ((op & NOT) == NOT) {
|
| op = static_cast<LogicalOp>(op & ~NOT);
|
| immediate = ~immediate;
|
| - if (rd.Is32Bits()) {
|
| - immediate &= kWRegMask;
|
| - }
|
| }
|
|
|
| + // Ignore the top 32 bits of an immediate if we're moving to a W register.
|
| + if (rd.Is32Bits()) {
|
| + // Check that the top 32 bits are consistent.
|
| + ASSERT(((immediate >> kWRegSizeInBits) == 0) ||
|
| + ((immediate >> kWRegSizeInBits) == -1));
|
| + immediate &= kWRegMask;
|
| + }
|
| +
|
| + ASSERT(rd.Is64Bits() || is_uint32(immediate));
|
| +
|
| // Special cases for all set or all clear immediates.
|
| if (immediate == 0) {
|
| switch (op) {
|
|
|