Change some tests to be valid PNaCl IR (parameter type from i1 -> i32).

src/IceTargetLoweringX8632.cpp

 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the TargetLoweringX8632 class, which
@@ skipping 1263 matching lines @@
       // being somewhat clumsy in the current IR, so we use a
       // workaround.  Force the operand into a (xmm) register, and
       // then push the register.  An xmm register push is actually not
       // possible in x86, but the Push instruction emitter handles
       // this by decrementing the stack pointer and directly writing
       // the xmm register value.
       Variable *T = NULL;
       _mov(T, Arg);
       _push(T);
     } else {
+      // Otherwise PNaCl requires parameter types to be at least 32-bits.
+      assert(Arg->getType() == IceType_f32 || Arg->getType() == IceType_i32);
       _push(Arg);
     }
     StackOffset += typeWidthInBytesOnStack(Arg->getType());
   }
   // Generate the call instruction.  Assign its result to a temporary
   // with high register allocation weight.
   Variable *Dest = Instr->getDest();
   Variable *eax = NULL; // doubles as RegLo as necessary
   Variable *edx = NULL;
   if (Dest) {
@@ skipping 973 matching lines @@
   // llvm-mc doesn't parse "dword ptr [.L$foo]".
   Str << "dword ptr [L$" << IceType_f32 << "$" << getPoolEntryID() << "]";
 }
 
 template <> void ConstantDouble::emit(GlobalContext *Ctx) const {
   Ostream &Str = Ctx->getStrEmit();
   Str << "qword ptr [L$" << IceType_f64 << "$" << getPoolEntryID() << "]";
 }
 
 } // end of namespace Ice