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Side by Side Diff: src/IceTargetLoweringX8632.cpp

Issue 339643003: Legalize div/idiv operands to avoid immediates. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: default args Created 6 years, 6 months ago
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1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file implements the TargetLoweringX8632 class, which 10 // This file implements the TargetLoweringX8632 class, which
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1129 _mov(Dest, T); 1129 _mov(Dest, T);
1130 break; 1130 break;
1131 case InstArithmetic::Ashr: 1131 case InstArithmetic::Ashr:
1132 _mov(T, Src0); 1132 _mov(T, Src0);
1133 if (!llvm::isa<Constant>(Src1)) 1133 if (!llvm::isa<Constant>(Src1))
1134 Src1 = legalizeToVar(Src1, false, Reg_ecx); 1134 Src1 = legalizeToVar(Src1, false, Reg_ecx);
1135 _sar(T, Src1); 1135 _sar(T, Src1);
1136 _mov(Dest, T); 1136 _mov(Dest, T);
1137 break; 1137 break;
1138 case InstArithmetic::Udiv: 1138 case InstArithmetic::Udiv:
1139 // div and idiv are the few arithmetic operators that do not allow
1140 // immediates as the operand.
1141 Src1 = legalize(Src1, Legal_Reg | Legal_Mem);
1139 if (Dest->getType() == IceType_i8) { 1142 if (Dest->getType() == IceType_i8) {
1140 Variable *T_ah = NULL; 1143 Variable *T_ah = NULL;
1141 Constant *Zero = Ctx->getConstantInt(IceType_i8, 0); 1144 Constant *Zero = Ctx->getConstantInt(IceType_i8, 0);
1142 _mov(T, Src0, Reg_eax); 1145 _mov(T, Src0, Reg_eax);
1143 _mov(T_ah, Zero, Reg_ah); 1146 _mov(T_ah, Zero, Reg_ah);
1144 _div(T, Src1, T_ah); 1147 _div(T, Src1, T_ah);
1145 _mov(Dest, T); 1148 _mov(Dest, T);
1146 } else { 1149 } else {
1147 Constant *Zero = Ctx->getConstantInt(IceType_i32, 0); 1150 Constant *Zero = Ctx->getConstantInt(IceType_i32, 0);
1148 _mov(T, Src0, Reg_eax); 1151 _mov(T, Src0, Reg_eax);
1149 _mov(T_edx, Zero, Reg_edx); 1152 _mov(T_edx, Zero, Reg_edx);
1150 _div(T, Src1, T_edx); 1153 _div(T, Src1, T_edx);
1151 _mov(Dest, T); 1154 _mov(Dest, T);
1152 } 1155 }
1153 break; 1156 break;
1154 case InstArithmetic::Sdiv: 1157 case InstArithmetic::Sdiv:
1158 Src1 = legalize(Src1, Legal_Reg | Legal_Mem);
1155 T_edx = makeReg(IceType_i32, Reg_edx); 1159 T_edx = makeReg(IceType_i32, Reg_edx);
1156 _mov(T, Src0, Reg_eax); 1160 _mov(T, Src0, Reg_eax);
1157 _cdq(T_edx, T); 1161 _cdq(T_edx, T);
1158 _idiv(T, Src1, T_edx); 1162 _idiv(T, Src1, T_edx);
1159 _mov(Dest, T); 1163 _mov(Dest, T);
1160 break; 1164 break;
1161 case InstArithmetic::Urem: 1165 case InstArithmetic::Urem:
1166 Src1 = legalize(Src1, Legal_Reg | Legal_Mem);
1162 if (Dest->getType() == IceType_i8) { 1167 if (Dest->getType() == IceType_i8) {
1163 Variable *T_ah = NULL; 1168 Variable *T_ah = NULL;
1164 Constant *Zero = Ctx->getConstantInt(IceType_i8, 0); 1169 Constant *Zero = Ctx->getConstantInt(IceType_i8, 0);
1165 _mov(T, Src0, Reg_eax); 1170 _mov(T, Src0, Reg_eax);
1166 _mov(T_ah, Zero, Reg_ah); 1171 _mov(T_ah, Zero, Reg_ah);
1167 _div(T_ah, Src1, T); 1172 _div(T_ah, Src1, T);
1168 _mov(Dest, T_ah); 1173 _mov(Dest, T_ah);
1169 } else { 1174 } else {
1170 Constant *Zero = Ctx->getConstantInt(IceType_i32, 0); 1175 Constant *Zero = Ctx->getConstantInt(IceType_i32, 0);
1171 _mov(T_edx, Zero, Reg_edx); 1176 _mov(T_edx, Zero, Reg_edx);
1172 _mov(T, Src0, Reg_eax); 1177 _mov(T, Src0, Reg_eax);
1173 _div(T_edx, Src1, T); 1178 _div(T_edx, Src1, T);
1174 _mov(Dest, T_edx); 1179 _mov(Dest, T_edx);
1175 } 1180 }
1176 break; 1181 break;
1177 case InstArithmetic::Srem: 1182 case InstArithmetic::Srem:
1183 Src1 = legalize(Src1, Legal_Reg | Legal_Mem);
1178 T_edx = makeReg(IceType_i32, Reg_edx); 1184 T_edx = makeReg(IceType_i32, Reg_edx);
1179 _mov(T, Src0, Reg_eax); 1185 _mov(T, Src0, Reg_eax);
1180 _cdq(T_edx, T); 1186 _cdq(T_edx, T);
1181 _idiv(T_edx, Src1, T); 1187 _idiv(T_edx, Src1, T);
1182 _mov(Dest, T_edx); 1188 _mov(Dest, T_edx);
1183 break; 1189 break;
1184 case InstArithmetic::Fadd: 1190 case InstArithmetic::Fadd:
1185 _mov(T, Src0); 1191 _mov(T, Src0);
1186 _addss(T, Src1); 1192 _addss(T, Src1);
1187 _mov(Dest, T); 1193 _mov(Dest, T);
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1363 void TargetX8632::lowerCast(const InstCast *Inst) { 1369 void TargetX8632::lowerCast(const InstCast *Inst) {
1364 // a = cast(b) ==> t=cast(b); a=t; (link t->b, link a->t, no overlap) 1370 // a = cast(b) ==> t=cast(b); a=t; (link t->b, link a->t, no overlap)
1365 InstCast::OpKind CastKind = Inst->getCastKind(); 1371 InstCast::OpKind CastKind = Inst->getCastKind();
1366 Variable *Dest = Inst->getDest(); 1372 Variable *Dest = Inst->getDest();
1367 // Src0RM is the source operand legalized to physical register or memory, but 1373 // Src0RM is the source operand legalized to physical register or memory, but
1368 // not immediate, since the relevant x86 native instructions don't allow an 1374 // not immediate, since the relevant x86 native instructions don't allow an
1369 // immediate operand. If the operand is an immediate, we could consider 1375 // immediate operand. If the operand is an immediate, we could consider
1370 // computing the strength-reduced result at translation time, but we're 1376 // computing the strength-reduced result at translation time, but we're
1371 // unlikely to see something like that in the bitcode that the optimizer 1377 // unlikely to see something like that in the bitcode that the optimizer
1372 // wouldn't have already taken care of. 1378 // wouldn't have already taken care of.
1373 Operand *Src0RM = legalize(Inst->getSrc(0), Legal_Reg | Legal_Mem, true); 1379 Operand *Src0RM = legalize(Inst->getSrc(0), Legal_Reg | Legal_Mem);
1374 switch (CastKind) { 1380 switch (CastKind) {
1375 default: 1381 default:
1376 Func->setError("Cast type not supported"); 1382 Func->setError("Cast type not supported");
1377 return; 1383 return;
1378 case InstCast::Sext: 1384 case InstCast::Sext:
1379 if (Dest->getType() == IceType_i64) { 1385 if (Dest->getType() == IceType_i64) {
1380 // t1=movsx src; t2=t1; t2=sar t2, 31; dst.lo=t1; dst.hi=t2 1386 // t1=movsx src; t2=t1; t2=sar t2, 31; dst.lo=t1; dst.hi=t2
1381 Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); 1387 Variable *DestLo = llvm::cast<Variable>(loOperand(Dest));
1382 Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); 1388 Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest));
1383 Variable *T_Lo = makeReg(DestLo->getType()); 1389 Variable *T_Lo = makeReg(DestLo->getType());
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2261 // llvm-mc doesn't parse "dword ptr [.L$foo]". 2267 // llvm-mc doesn't parse "dword ptr [.L$foo]".
2262 Str << "dword ptr [L$" << IceType_f32 << "$" << getPoolEntryID() << "]"; 2268 Str << "dword ptr [L$" << IceType_f32 << "$" << getPoolEntryID() << "]";
2263 } 2269 }
2264 2270
2265 template <> void ConstantDouble::emit(GlobalContext *Ctx) const { 2271 template <> void ConstantDouble::emit(GlobalContext *Ctx) const {
2266 Ostream &Str = Ctx->getStrEmit(); 2272 Ostream &Str = Ctx->getStrEmit();
2267 Str << "qword ptr [L$" << IceType_f64 << "$" << getPoolEntryID() << "]"; 2273 Str << "qword ptr [L$" << IceType_f64 << "$" << getPoolEntryID() << "]";
2268 } 2274 }
2269 2275
2270 } // end of namespace Ice 2276 } // end of namespace Ice
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