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Issue 337273003: Remove unused variables from assembler-arm.cc. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 6 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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393 UNREACHABLE(); 393 UNREACHABLE();
394 type_ = nlt_1; 394 type_ = nlt_1;
395 break; 395 break;
396 } 396 }
397 } 397 }
398 398
399 399
400 // ----------------------------------------------------------------------------- 400 // -----------------------------------------------------------------------------
401 // Specific instructions, constants, and masks. 401 // Specific instructions, constants, and masks.
402 402
403 // add(sp, sp, 4) instruction (aka Pop())
404 const Instr kPopInstruction =
405 al | PostIndex | 4 | LeaveCC | I | kRegister_sp_Code * B16 |
406 kRegister_sp_Code * B12;
407 // str(r, MemOperand(sp, 4, NegPreIndex), al) instruction (aka push(r)) 403 // str(r, MemOperand(sp, 4, NegPreIndex), al) instruction (aka push(r))
408 // register r is not encoded. 404 // register r is not encoded.
409 const Instr kPushRegPattern = 405 const Instr kPushRegPattern =
410 al | B26 | 4 | NegPreIndex | kRegister_sp_Code * B16; 406 al | B26 | 4 | NegPreIndex | kRegister_sp_Code * B16;
411 // ldr(r, MemOperand(sp, 4, PostIndex), al) instruction (aka pop(r)) 407 // ldr(r, MemOperand(sp, 4, PostIndex), al) instruction (aka pop(r))
412 // register r is not encoded. 408 // register r is not encoded.
413 const Instr kPopRegPattern = 409 const Instr kPopRegPattern =
414 al | B26 | L | 4 | PostIndex | kRegister_sp_Code * B16; 410 al | B26 | L | 4 | PostIndex | kRegister_sp_Code * B16;
415 // mov lr, pc
416 const Instr kMovLrPc = al | MOV | kRegister_pc_Code | kRegister_lr_Code * B12;
417 // ldr rd, [pc, #offset] 411 // ldr rd, [pc, #offset]
418 const Instr kLdrPCImmedMask = 15 * B24 | 7 * B20 | 15 * B16; 412 const Instr kLdrPCImmedMask = 15 * B24 | 7 * B20 | 15 * B16;
419 const Instr kLdrPCImmedPattern = 5 * B24 | L | kRegister_pc_Code * B16; 413 const Instr kLdrPCImmedPattern = 5 * B24 | L | kRegister_pc_Code * B16;
420 // ldr rd, [pp, #offset] 414 // ldr rd, [pp, #offset]
421 const Instr kLdrPpImmedMask = 15 * B24 | 7 * B20 | 15 * B16; 415 const Instr kLdrPpImmedMask = 15 * B24 | 7 * B20 | 15 * B16;
422 const Instr kLdrPpImmedPattern = 5 * B24 | L | kRegister_r8_Code * B16; 416 const Instr kLdrPpImmedPattern = 5 * B24 | L | kRegister_r8_Code * B16;
423 // vldr dd, [pc, #offset] 417 // vldr dd, [pc, #offset]
424 const Instr kVldrDPCMask = 15 * B24 | 3 * B20 | 15 * B16 | 15 * B8; 418 const Instr kVldrDPCMask = 15 * B24 | 3 * B20 | 15 * B16 | 15 * B8;
425 const Instr kVldrDPCPattern = 13 * B24 | L | kRegister_pc_Code * B16 | 11 * B8; 419 const Instr kVldrDPCPattern = 13 * B24 | L | kRegister_pc_Code * B16 | 11 * B8;
426 // vldr dd, [pp, #offset] 420 // vldr dd, [pp, #offset]
427 const Instr kVldrDPpMask = 15 * B24 | 3 * B20 | 15 * B16 | 15 * B8; 421 const Instr kVldrDPpMask = 15 * B24 | 3 * B20 | 15 * B16 | 15 * B8;
428 const Instr kVldrDPpPattern = 13 * B24 | L | kRegister_r8_Code * B16 | 11 * B8; 422 const Instr kVldrDPpPattern = 13 * B24 | L | kRegister_r8_Code * B16 | 11 * B8;
429 // blxcc rm 423 // blxcc rm
430 const Instr kBlxRegMask = 424 const Instr kBlxRegMask =
431 15 * B24 | 15 * B20 | 15 * B16 | 15 * B12 | 15 * B8 | 15 * B4; 425 15 * B24 | 15 * B20 | 15 * B16 | 15 * B12 | 15 * B8 | 15 * B4;
432 const Instr kBlxRegPattern = 426 const Instr kBlxRegPattern =
433 B24 | B21 | 15 * B16 | 15 * B12 | 15 * B8 | BLX; 427 B24 | B21 | 15 * B16 | 15 * B12 | 15 * B8 | BLX;
434 const Instr kBlxIp = al | kBlxRegPattern | ip.code(); 428 const Instr kBlxIp = al | kBlxRegPattern | ip.code();
435 const Instr kMovMvnMask = 0x6d * B21 | 0xf * B16; 429 const Instr kMovMvnMask = 0x6d * B21 | 0xf * B16;
436 const Instr kMovMvnPattern = 0xd * B21; 430 const Instr kMovMvnPattern = 0xd * B21;
437 const Instr kMovMvnFlip = B22; 431 const Instr kMovMvnFlip = B22;
438 const Instr kMovLeaveCCMask = 0xdff * B16; 432 const Instr kMovLeaveCCMask = 0xdff * B16;
439 const Instr kMovLeaveCCPattern = 0x1a0 * B16; 433 const Instr kMovLeaveCCPattern = 0x1a0 * B16;
440 const Instr kMovwMask = 0xff * B20;
441 const Instr kMovwPattern = 0x30 * B20;
442 const Instr kMovwLeaveCCFlip = 0x5 * B21; 434 const Instr kMovwLeaveCCFlip = 0x5 * B21;
443 const Instr kCmpCmnMask = 0xdd * B20 | 0xf * B12; 435 const Instr kCmpCmnMask = 0xdd * B20 | 0xf * B12;
444 const Instr kCmpCmnPattern = 0x15 * B20; 436 const Instr kCmpCmnPattern = 0x15 * B20;
445 const Instr kCmpCmnFlip = B21; 437 const Instr kCmpCmnFlip = B21;
446 const Instr kAddSubFlip = 0x6 * B21; 438 const Instr kAddSubFlip = 0x6 * B21;
447 const Instr kAndBicFlip = 0xe * B21; 439 const Instr kAndBicFlip = 0xe * B21;
448 440
449 // A mask for the Rd register for push, pop, ldr, str instructions. 441 // A mask for the Rd register for push, pop, ldr, str instructions.
450 const Instr kLdrRegFpOffsetPattern = 442 const Instr kLdrRegFpOffsetPattern =
451 al | B26 | L | Offset | kRegister_fp_Code * B16; 443 al | B26 | L | Offset | kRegister_fp_Code * B16;
452 const Instr kStrRegFpOffsetPattern = 444 const Instr kStrRegFpOffsetPattern =
453 al | B26 | Offset | kRegister_fp_Code * B16; 445 al | B26 | Offset | kRegister_fp_Code * B16;
454 const Instr kLdrRegFpNegOffsetPattern = 446 const Instr kLdrRegFpNegOffsetPattern =
455 al | B26 | L | NegOffset | kRegister_fp_Code * B16; 447 al | B26 | L | NegOffset | kRegister_fp_Code * B16;
456 const Instr kStrRegFpNegOffsetPattern = 448 const Instr kStrRegFpNegOffsetPattern =
457 al | B26 | NegOffset | kRegister_fp_Code * B16; 449 al | B26 | NegOffset | kRegister_fp_Code * B16;
458 const Instr kLdrStrInstrTypeMask = 0xffff0000; 450 const Instr kLdrStrInstrTypeMask = 0xffff0000;
459 const Instr kLdrStrInstrArgumentMask = 0x0000ffff;
460 const Instr kLdrStrOffsetMask = 0x00000fff;
461 451
462 452
463 Assembler::Assembler(Isolate* isolate, void* buffer, int buffer_size) 453 Assembler::Assembler(Isolate* isolate, void* buffer, int buffer_size)
464 : AssemblerBase(isolate, buffer, buffer_size), 454 : AssemblerBase(isolate, buffer, buffer_size),
465 recorded_ast_id_(TypeFeedbackId::None()), 455 recorded_ast_id_(TypeFeedbackId::None()),
466 constant_pool_builder_(), 456 constant_pool_builder_(),
467 positions_recorder_(this) { 457 positions_recorder_(this) {
468 reloc_info_writer.Reposition(buffer_ + buffer_size_, pc_); 458 reloc_info_writer.Reposition(buffer_ + buffer_size_, pc_);
469 num_pending_32_bit_reloc_info_ = 0; 459 num_pending_32_bit_reloc_info_ = 0;
470 num_pending_64_bit_reloc_info_ = 0; 460 num_pending_64_bit_reloc_info_ = 0;
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3684 ASSERT((index_64bit == count_of_64bit_) && 3674 ASSERT((index_64bit == count_of_64bit_) &&
3685 (index_code_ptr == (index_64bit + count_of_code_ptr_)) && 3675 (index_code_ptr == (index_64bit + count_of_code_ptr_)) &&
3686 (index_heap_ptr == (index_code_ptr + count_of_heap_ptr_)) && 3676 (index_heap_ptr == (index_code_ptr + count_of_heap_ptr_)) &&
3687 (index_32bit == (index_heap_ptr + count_of_32bit_))); 3677 (index_32bit == (index_heap_ptr + count_of_32bit_)));
3688 } 3678 }
3689 3679
3690 3680
3691 } } // namespace v8::internal 3681 } } // namespace v8::internal
3692 3682
3693 #endif // V8_TARGET_ARCH_ARM 3683 #endif // V8_TARGET_ARCH_ARM
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