| Index: gcc/gcc/config/i386/i386.md
|
| diff --git a/gcc/gcc/config/i386/i386.md b/gcc/gcc/config/i386/i386.md
|
| index ddf9e9c2b98308bdb28f6c8b186bbbcf7f1c5ef8..af717f423ef1658b5328c1eaa373873b0ee1b8cd 100644
|
| --- a/gcc/gcc/config/i386/i386.md
|
| +++ b/gcc/gcc/config/i386/i386.md
|
| @@ -5917,7 +5917,7 @@
|
| [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
|
| (plus:SI (plus:SI (match_operand:SI 3 "ix86_carry_flag_operator" "")
|
| (match_operand:SI 1 "nonimmediate_operand" "%0,0"))
|
| - (match_operand:SI 2 "general_operand" "ri,rm")))
|
| + (match_operand:SI 2 "x86_64_general_operand" "re,rm")))
|
| (clobber (reg:CC FLAGS_REG))]
|
| "ix86_binary_operator_ok (PLUS, SImode, operands)"
|
| "adc{l}\t{%2, %0|%0, %2}"
|
| @@ -6586,7 +6586,7 @@
|
| [(set (match_operand:DI 0 "register_operand" "=r,r")
|
| (zero_extend:DI
|
| (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,r")
|
| - (match_operand:SI 2 "general_operand" "g,le"))))
|
| + (match_operand:SI 2 "x86_64_general_operand" "rem,le"))))
|
| (clobber (reg:CC FLAGS_REG))]
|
| "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)"
|
| {
|
| @@ -9281,14 +9281,14 @@
|
| (define_expand "andsi3"
|
| [(set (match_operand:SI 0 "nonimmediate_operand" "")
|
| (and:SI (match_operand:SI 1 "nonimmediate_operand" "")
|
| - (match_operand:SI 2 "general_operand" "")))]
|
| + (match_operand:SI 2 "x86_64_general_operand" "")))]
|
| ""
|
| "ix86_expand_binary_operator (AND, SImode, operands); DONE;")
|
|
|
| (define_insn "*andsi_1"
|
| [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r,r")
|
| (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,qm")
|
| - (match_operand:SI 2 "general_operand" "ri,rm,L")))
|
| + (match_operand:SI 2 "x86_64_general_operand" "re,rm,L")))
|
| (clobber (reg:CC FLAGS_REG))]
|
| "ix86_binary_operator_ok (AND, SImode, operands)"
|
| {
|
| @@ -9365,7 +9365,7 @@
|
| [(set (match_operand:DI 0 "register_operand" "=r")
|
| (zero_extend:DI
|
| (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
|
| - (match_operand:SI 2 "general_operand" "g"))))
|
| + (match_operand:SI 2 "x86_64_general_operand" "rem"))))
|
| (clobber (reg:CC FLAGS_REG))]
|
| "TARGET_64BIT && ix86_binary_operator_ok (AND, SImode, operands)"
|
| "and{l}\t{%2, %k0|%k0, %2}"
|
| @@ -9375,7 +9375,7 @@
|
| (define_insn "*andsi_2"
|
| [(set (reg FLAGS_REG)
|
| (compare (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0")
|
| - (match_operand:SI 2 "general_operand" "g,ri"))
|
| + (match_operand:SI 2 "x86_64_general_operand" "rem,re"))
|
| (const_int 0)))
|
| (set (match_operand:SI 0 "nonimmediate_operand" "=r,rm")
|
| (and:SI (match_dup 1) (match_dup 2)))]
|
| @@ -9389,7 +9389,7 @@
|
| (define_insn "*andsi_2_zext"
|
| [(set (reg FLAGS_REG)
|
| (compare (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
|
| - (match_operand:SI 2 "general_operand" "g"))
|
| + (match_operand:SI 2 "x86_64_general_operand" "rem"))
|
| (const_int 0)))
|
| (set (match_operand:DI 0 "register_operand" "=r")
|
| (zero_extend:DI (and:SI (match_dup 1) (match_dup 2))))]
|
|
|