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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <limits.h> // For LONG_MIN, LONG_MAX. | 5 #include <limits.h> // For LONG_MIN, LONG_MAX. |
6 | 6 |
7 #include "v8.h" | 7 #include "v8.h" |
8 | 8 |
9 #if V8_TARGET_ARCH_ARM | 9 #if V8_TARGET_ARCH_ARM |
10 | 10 |
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398 | 398 |
399 void MacroAssembler::Store(Register src, | 399 void MacroAssembler::Store(Register src, |
400 const MemOperand& dst, | 400 const MemOperand& dst, |
401 Representation r) { | 401 Representation r) { |
402 ASSERT(!r.IsDouble()); | 402 ASSERT(!r.IsDouble()); |
403 if (r.IsInteger8() || r.IsUInteger8()) { | 403 if (r.IsInteger8() || r.IsUInteger8()) { |
404 strb(src, dst); | 404 strb(src, dst); |
405 } else if (r.IsInteger16() || r.IsUInteger16()) { | 405 } else if (r.IsInteger16() || r.IsUInteger16()) { |
406 strh(src, dst); | 406 strh(src, dst); |
407 } else { | 407 } else { |
| 408 if (r.IsHeapObject()) { |
| 409 AssertNotSmi(src); |
| 410 } else if (r.IsSmi()) { |
| 411 AssertSmi(src); |
| 412 } |
408 str(src, dst); | 413 str(src, dst); |
409 } | 414 } |
410 } | 415 } |
411 | 416 |
412 | 417 |
413 void MacroAssembler::LoadRoot(Register destination, | 418 void MacroAssembler::LoadRoot(Register destination, |
414 Heap::RootListIndex index, | 419 Heap::RootListIndex index, |
415 Condition cond) { | 420 Condition cond) { |
416 if (CpuFeatures::IsSupported(MOVW_MOVT_IMMEDIATE_LOADS) && | 421 if (CpuFeatures::IsSupported(MOVW_MOVT_IMMEDIATE_LOADS) && |
417 isolate()->heap()->RootCanBeTreatedAsConstant(index) && | 422 isolate()->heap()->RootCanBeTreatedAsConstant(index) && |
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4068 sub(result, result, Operand(dividend)); | 4073 sub(result, result, Operand(dividend)); |
4069 } | 4074 } |
4070 if (ms.shift() > 0) mov(result, Operand(result, ASR, ms.shift())); | 4075 if (ms.shift() > 0) mov(result, Operand(result, ASR, ms.shift())); |
4071 add(result, result, Operand(dividend, LSR, 31)); | 4076 add(result, result, Operand(dividend, LSR, 31)); |
4072 } | 4077 } |
4073 | 4078 |
4074 | 4079 |
4075 } } // namespace v8::internal | 4080 } } // namespace v8::internal |
4076 | 4081 |
4077 #endif // V8_TARGET_ARCH_ARM | 4082 #endif // V8_TARGET_ARCH_ARM |
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