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| 1 ; This test originally exhibited a bug in ebp-based stack slots. The |
| 2 ; problem was that during a function call push sequence, the esp |
| 3 ; adjustment was incorrectly added to the stack/frame offset for |
| 4 ; ebp-based frames. |
| 5 |
| 6 ; RUN: %llvm2ice -Om1 --target=x8632 --verbose none %s | FileCheck %s |
| 7 |
| 8 declare i32 @memcpy_helper2(i32 %buf, i32 %buf2, i32 %n); |
| 9 |
| 10 define i32 @memcpy_helper(i32 %buf, i32 %n) { |
| 11 entry: |
| 12 %n.arg_trunc = trunc i32 %n to i8 |
| 13 %buf2 = alloca i8, i32 128, align 4 |
| 14 %buf2.asint = ptrtoint i8* %buf2 to i32 |
| 15 %arg_ext = zext i8 %n.arg_trunc to i32 |
| 16 %call = call i32 @memcpy_helper2(i32 %buf, i32 %buf2.asint, i32 %arg_ext) |
| 17 ret i32 %call |
| 18 } |
| 19 |
| 20 ; This check sequence is highly specific to the current Om1 lowering |
| 21 ; and stack slot assignment code, and may need to be relaxed if the |
| 22 ; lowering code changes. |
| 23 |
| 24 ; CHECK: memcpy_helper: |
| 25 ; CHECK: push ebp |
| 26 ; CHECK: mov ebp, esp |
| 27 ; CHECK: sub esp, 20 |
| 28 ; CHECK: mov eax, dword ptr [ebp+12] |
| 29 ; CHECK: mov dword ptr [ebp-4], eax |
| 30 ; CHECK: sub esp, 128 |
| 31 ; CHECK: mov dword ptr [ebp-8], esp |
| 32 ; CHECK: mov eax, dword ptr [ebp-8] |
| 33 ; CHECK: mov dword ptr [ebp-12], eax |
| 34 ; CHECK: movzx eax, byte ptr [ebp-4] |
| 35 ; CHECK: mov dword ptr [ebp-16], eax |
| 36 ; CHECK: push dword ptr [ebp-16] |
| 37 ; CHECK: push dword ptr [ebp-12] |
| 38 ; CHECK: push dword ptr [ebp+8] |
| 39 ; CHECK: call memcpy_helper2 |
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