| Index: arch/arm/mach-tegra/nv/include/nvodm_query_pins.h
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| diff --git a/arch/arm/mach-tegra/nv/include/nvodm_query_pins.h b/arch/arm/mach-tegra/nv/include/nvodm_query_pins.h
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| new file mode 100644
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| index 0000000000000000000000000000000000000000..6c769213689ee7a8b0a3a5116e35bfa09c2c602a
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| --- /dev/null
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| +++ b/arch/arm/mach-tegra/nv/include/nvodm_query_pins.h
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| @@ -0,0 +1,106 @@
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| +/*
|
| + * Copyright (c) 2008-2009 NVIDIA Corporation.
|
| + * All rights reserved.
|
| + *
|
| + * Redistribution and use in source and binary forms, with or without
|
| + * modification, are permitted provided that the following conditions are met:
|
| + *
|
| + * Redistributions of source code must retain the above copyright notice,
|
| + * this list of conditions and the following disclaimer.
|
| + *
|
| + * Redistributions in binary form must reproduce the above copyright notice,
|
| + * this list of conditions and the following disclaimer in the documentation
|
| + * and/or other materials provided with the distribution.
|
| + *
|
| + * Neither the name of the NVIDIA Corporation nor the names of its contributors
|
| + * may be used to endorse or promote products derived from this software
|
| + * without specific prior written permission.
|
| + *
|
| + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
| + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
| + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
| + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
| + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
| + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
| + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
| + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
| + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
| + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
| + * POSSIBILITY OF SUCH DAMAGE.
|
| + *
|
| + */
|
| +
|
| +/**
|
| + * @file
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| + * <b>NVIDIA Tegra ODM Kit:
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| + * Pin Attributes Query Interface</b>
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| + *
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| + * @b Description: Provides a mechanism for ODMs to specify electrical
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| + * attributes, such as drive strength, for pins.
|
| + */
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| +
|
| +#ifndef INCLUDED_NVODM_QUERY_PINS_H
|
| +#define INCLUDED_NVODM_QUERY_PINS_H
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| +
|
| +/**
|
| + * @defgroup nvodm_pins Pin Electrical Attributes Query Interface
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| + * This is the ODM query interface for pin electrical attributes.
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| + *
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| + * Pin attribute settings match the hardware register definitions very
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| + * closely, and as such are specified in a chip-specific format. C-language
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| + * pre-processor macros are provided to allow for as much code readability
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| + * and maintainability as possible. Because the organization and the
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| + * electrical fine-tuning capabilities of the pins may change between
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| + * products, ODMs should ensure that they are using the macros that match
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| + * the SOC in their product.
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| + * @ingroup nvodm_query
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| + * @{
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| + */
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| +
|
| +#include "nvcommon.h"
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| +
|
| +#if defined(__cplusplus)
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| +extern "C"
|
| +{
|
| +#endif
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| +
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| +
|
| +/**
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| + * Defines the pin attributes record.
|
| + */
|
| +typedef struct NvOdmPinAttribRec
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| +{
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| + /// Specifies the configuration register to assign, which should be
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| + /// one of the application processor's NvOdmPinRegister enumerants.
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| + NvU32 ConfigRegister;
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| +
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| + /// Specifies the value to assign to the specified configuration register.
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| + /// Each application processor's header file provides pre-processor
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| + /// macros to assist in defining this value.
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| + NvU32 Value;
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| +} NvOdmPinAttrib;
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| +
|
| +/**
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| + * Gets a list of [configuration register, value] pairs that are applied
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| + * to the application processor's pin configuration registers. Any
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| + * pin configuration register that is not specified in this list is left at
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| + * its current state.
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| + *
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| + * @param pPinAttributes A returned pointer to an array of constant pin
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| + * configuration attributes, or NULL if no pin configuration registers
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| + * should be programmed.
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| + *
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| + * @return The number of pin configuration attributes in \a pPinAttributes, or
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| + * 0 if none.
|
| + */
|
| +
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| +NvU32
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| +NvOdmQueryPinAttributes(const NvOdmPinAttrib **pPinAttributes);
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| +
|
| +#if defined(__cplusplus)
|
| +}
|
| +#endif
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| +
|
| +/** @} */
|
| +#endif
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| +
|
|
|