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Issue 3256004: [ARM] tegra: add nvos/nvrm/nvmap drivers (Closed) Base URL: ssh://git@gitrw.chromium.org/kernel.git
Patch Set: remove ap15 headers Created 10 years, 3 months ago
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1 /*
2 * Copyright (c) 2009 NVIDIA Corporation.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright notice,
12 * this list of conditions and the following disclaimer in the documentation
13 * and/or other materials provided with the distribution.
14 *
15 * Neither the name of the NVIDIA Corporation nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 *
31 */
32
33 #ifndef INCLUDED_nvrm_pmu_H
34 #define INCLUDED_nvrm_pmu_H
35
36
37 #if defined(__cplusplus)
38 extern "C"
39 {
40 #endif
41
42 #include "nvrm_init.h"
43
44 /**
45 * @defgroup nvrm_pmu
46 *
47 * This is the power management unit (PMU) API for Rm, which
48 * handles the abstraction of external power management devices.
49 * For NVIDIA® Driver Development Kit (DDK) clients, PMU is a
50 * set of voltages used to provide power to the SoC or to monitor low battery
51 * conditions. The API allows DDK clients to determine whether the
52 * particular voltage is supported by the ODM platform, retrieve the
53 * capabilities of PMU, and get/set voltage levels at runtime.
54 *
55 * All voltage rails are referenced using ODM-assigned unsigned integers. ODMs
56 * may select any convention for assigning these values; however, the values
57 * accepted as input parameters by the PMU ODM adaptation interface must
58 * match the values stored in the address field of \c NvRmIoModule_Vdd buses
59 * defined in the Peripheral Discovery ODM adaptation.
60 *
61 *
62 * @ingroup nvrm_pmu
63 * @{
64 */
65
66 /**
67 * Combines information for the particular PMU Vdd rail.
68 */
69
70 typedef struct NvRmPmuVddRailCapabilitiesRec
71 {
72
73 /// Specifies ODM protection attribute; if \c NV_TRUE PMU hardware
74 /// or ODM Kit would protect this voltage from being changed by NvDdk clien t.
75 NvBool RmProtected;
76
77 /// Specifies the minimum voltage level in mV.
78 NvU32 MinMilliVolts;
79
80 /// Specifies the step voltage level in mV.
81 NvU32 StepMilliVolts;
82
83 /// Specifies the maximum voltage level in mV.
84 NvU32 MaxMilliVolts;
85
86 /// Specifies the request voltage level in mV.
87 NvU32 requestMilliVolts;
88 } NvRmPmuVddRailCapabilities;
89
90 /// Special level to indicate voltage plane is disabled.
91 #define ODM_VOLTAGE_OFF (0UL)
92
93 /**
94 * Gets capabilities for the specified PMU voltage.
95 *
96 * @param vddId The ODM-defined PMU rail ID.
97 * @param pCapabilities A pointer to the targeted
98 * capabilities returned by the ODM.
99 */
100
101 void NvRmPmuGetCapabilities(
102 NvRmDeviceHandle hDevice,
103 NvU32 vddId,
104 NvRmPmuVddRailCapabilities * pCapabilities );
105
106 /**
107 * Gets current voltage level for the specified PMU voltage.
108 *
109 * @param hDevice The Rm device handle.
110 * @param vddId The ODM-defined PMU rail ID.
111 * @param pMilliVolts A pointer to the voltage level returned
112 * by the ODM.
113 */
114
115 void NvRmPmuGetVoltage(
116 NvRmDeviceHandle hDevice,
117 NvU32 vddId,
118 NvU32 * pMilliVolts );
119
120 /**
121 * Sets new voltage level for the specified PMU voltage.
122 *
123 * @param hDevice The Rm device handle.
124 * @param vddId The ODM-defined PMU rail ID.
125 * @param MilliVolts The new voltage level to be set in millivolts (mV).
126 * Set to \c ODM_VOLTAGE_OFF to turn off the target voltage.
127 * @param pSettleMicroSeconds A pointer to the settling time in microseconds (uS ),
128 * which is the time for supply voltage to settle after this function
129 * returns; this may or may not include PMU control interface transaction time,
130 * depending on the ODM implementation. If null this parameter is ignored.
131 */
132
133 void NvRmPmuSetVoltage(
134 NvRmDeviceHandle hDevice,
135 NvU32 vddId,
136 NvU32 MilliVolts,
137 NvU32 * pSettleMicroSeconds );
138
139 /**
140 * Configures SoC power rail controls for the upcoming PMU voltage transition.
141 *
142 * @note Should be called just before PMU rail On/Off, or Off/On transition.
143 * Should not be called if rail voltage level is changing within On range.
144 *
145 * @param hDevice The Rm device handle.
146 * @param vddId The ODM-defined PMU rail ID.
147 * @param Enable Set NV_TRUE if target voltage is about to be turned On, or
148 * NV_FALSE if target voltage is about to be turned Off.
149 */
150
151 void NvRmPmuSetSocRailPowerState(
152 NvRmDeviceHandle hDevice,
153 NvU32 vddId,
154 NvBool Enable );
155
156 /**
157 * Defines Charging path.
158 */
159
160 typedef enum
161 {
162
163 /// Specifies external wall plug charger.
164 NvRmPmuChargingPath_MainPlug,
165
166 /// Specifies external USB bus charger.
167 NvRmPmuChargingPath_UsbBus,
168 NvRmPmuChargingPath_Num,
169 NvRmPmuChargingPath_Force32 = 0x7FFFFFFF
170 } NvRmPmuChargingPath;
171
172 /// Special level to indicate dumb charger current limit.
173 #define NVODM_DUMB_CHARGER_LIMIT (0xFFFFFFFFUL)
174
175 /**
176 * Defines AC status.
177 */
178
179 typedef enum
180 {
181
182 /// Specifies AC is offline.
183 NvRmPmuAcLine_Offline,
184
185 /// Specifies AC is online.
186 NvRmPmuAcLine_Online,
187
188 /// Specifies backup power.
189 NvRmPmuAcLine_BackupPower,
190 NvRmPmuAcLineStatus_Num,
191 NvRmPmuAcLineStatus_Force32 = 0x7FFFFFFF
192 } NvRmPmuAcLineStatus;
193
194 /** @name Battery Status Defines */
195 /*@{*/
196
197 #define NVODM_BATTERY_STATUS_HIGH 0x01
198 #define NVODM_BATTERY_STATUS_LOW 0x02
199 #define NVODM_BATTERY_STATUS_CRITICAL 0x04
200 #define NVODM_BATTERY_STATUS_CHARGING 0x08
201 #define NVODM_BATTERY_STATUS_NO_BATTERY 0x80
202 #define NVODM_BATTERY_STATUS_UNKNOWN 0xFF
203
204 /*@}*/
205 /** @name Battery Data Defines */
206 /*@{*/
207 #define NVODM_BATTERY_DATA_UNKNOWN 0x7FFFFFFF
208
209 /*@}*/
210
211 /**
212 * Defines battery instances.
213 */
214
215 typedef enum
216 {
217
218 /// Specifies main battery.
219 NvRmPmuBatteryInst_Main,
220 NvRmPmuBatteryInst_Backup,
221 NvRmPmuBatteryInstance_Num,
222 NvRmPmuBatteryInstance_Force32 = 0x7FFFFFFF
223 } NvRmPmuBatteryInstance;
224
225 /**
226 * Defines battery data.
227 */
228
229 typedef struct NvRmPmuBatteryDataRec
230 {
231
232 /// Specifies battery life percent.
233 NvU32 batteryLifePercent;
234
235 /// Specifies battery life time.
236 NvU32 batteryLifeTime;
237
238 /// Specifies voltage.
239 NvU32 batteryVoltage;
240
241 /// Specifies battery current.
242 NvS32 batteryCurrent;
243
244 /// Specifies battery average current.
245 NvS32 batteryAverageCurrent;
246
247 /// Specifies battery interval.
248 NvU32 batteryAverageInterval;
249
250 /// Specifies the mAH consumed.
251 NvU32 batteryMahConsumed;
252
253 /// Specifies battery temperature.
254 NvU32 batteryTemperature;
255 } NvRmPmuBatteryData;
256
257 /**
258 * Defines battery chemistry.
259 */
260
261 typedef enum
262 {
263
264 /// Specifies an alkaline battery.
265 NvRmPmuBatteryChemistry_Alkaline,
266
267 /// Specifies a nickel-cadmium (NiCd) battery.
268 NvRmPmuBatteryChemistry_NICD,
269
270 /// Specifies a nickel-metal hydride (NiMH) battery.
271 NvRmPmuBatteryChemistry_NIMH,
272
273 /// Specifies a lithium-ion (Li-ion) battery.
274 NvRmPmuBatteryChemistry_LION,
275
276 /// Specifies a lithium-ion polymer (Li-poly) battery.
277 NvRmPmuBatteryChemistry_LIPOLY,
278
279 /// Specifies a zinc-air battery.
280 NvRmPmuBatteryChemistry_XINCAIR,
281 NvRmPmuBatteryChemistry_Num,
282 NvRmPmuBatteryChemistry_Force32 = 0x7FFFFFFF
283 } NvRmPmuBatteryChemistry;
284
285 /**
286 * Sets the charging current limit.
287 *
288 * @param hRmDevice The Rm device handle.
289 * @param ChargingPath The charging path.
290 * @param ChargingCurrentLimitMa The charging current limit in mA.
291 * @param ChargerType Type of the charger detected
292 * @see NvOdmUsbChargerType
293 */
294
295 void NvRmPmuSetChargingCurrentLimit(
296 NvRmDeviceHandle hRmDevice,
297 NvRmPmuChargingPath ChargingPath,
298 NvU32 ChargingCurrentLimitMa,
299 NvU32 ChargerType );
300
301 /**
302 * Gets the AC line status.
303 *
304 * @param hDevice The Rm device handle.
305 * @param pStatus A pointer to the AC line
306 * status returned by the ODM.
307 *
308 * @return NV_TRUE if successful, or NV_FALSE otherwise.
309 */
310
311 NvBool NvRmPmuGetAcLineStatus(
312 NvRmDeviceHandle hRmDevice,
313 NvRmPmuAcLineStatus * pStatus );
314
315 /**
316 * Gets the battery status.
317 *
318 * @param hDevice The Rm device handle.
319 * @param batteryInst The battery type.
320 * @param pStatus A pointer to the battery
321 * status returned by the ODM.
322 *
323 * @return NV_TRUE if successful, or NV_FALSE otherwise.
324 */
325
326 NvBool NvRmPmuGetBatteryStatus(
327 NvRmDeviceHandle hRmDevice,
328 NvRmPmuBatteryInstance batteryInst,
329 NvU8 * pStatus );
330
331 /**
332 * Gets the battery data.
333 *
334 * @param hDevice The Rm device handle.
335 * @param batteryInst The battery type.
336 * @param pData A pointer to the battery
337 * data returned by the ODM.
338 *
339 * @return NV_TRUE if successful, or NV_FALSE otherwise.
340 */
341
342 NvBool NvRmPmuGetBatteryData(
343 NvRmDeviceHandle hRmDevice,
344 NvRmPmuBatteryInstance batteryInst,
345 NvRmPmuBatteryData * pData );
346
347 /**
348 * Gets the battery full life time.
349 *
350 * @param hDevice The Rm device handle.
351 * @param batteryInst The battery type.
352 * @param pLifeTime A pointer to the battery
353 * full life time returned by the ODM.
354 *
355 */
356
357 void NvRmPmuGetBatteryFullLifeTime(
358 NvRmDeviceHandle hRmDevice,
359 NvRmPmuBatteryInstance batteryInst,
360 NvU32 * pLifeTime );
361
362 /**
363 * Gets the battery chemistry.
364 *
365 * @param hDevice The Rm device handle.
366 * @param batteryInst The battery type.
367 * @param pChemistry A pointer to the battery
368 * chemistry returned by the ODM.
369 *
370 */
371
372 void NvRmPmuGetBatteryChemistry(
373 NvRmDeviceHandle hRmDevice,
374 NvRmPmuBatteryInstance batteryInst,
375 NvRmPmuBatteryChemistry * pChemistry );
376
377 /**
378 * Reads current RTC count in seconds.
379 *
380 * @param hRmDevice The Rm device handle.
381 * @param Count A pointer to the RTC count returned by this function.
382 *
383 * @return NV_TRUE if successful, or NV_FALSE otherwise.
384 */
385
386 NvBool NvRmPmuReadRtc(
387 NvRmDeviceHandle hRmDevice,
388 NvU32 * pCount );
389
390 /**
391 * Updates current RTC seconds count.
392 *
393 * @param hRmDevice The Rm device handle.
394 * @param Count Seconds count to update the RTC counter.
395 *
396 * @return NV_TRUE if successful, or NV_FALSE otherwise.
397 */
398
399 NvBool NvRmPmuWriteRtc(
400 NvRmDeviceHandle hRmDevice,
401 NvU32 Count );
402
403 /**
404 * Verifies whether the RTC is initialized.
405 *
406 * @param hRmDevice The Rm device handle.
407 *
408 * @return NV_TRUE if initialized, or NV_FALSE otherwise.
409 */
410
411 NvBool NvRmPmuIsRtcInitialized(
412 NvRmDeviceHandle hRmDevice );
413
414 /** @} */
415
416 #if defined(__cplusplus)
417 }
418 #endif
419
420 #endif
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