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| 1 /* |
| 2 * Copyright (c) 2009 NVIDIA Corporation. |
| 3 * All rights reserved. |
| 4 * |
| 5 * Redistribution and use in source and binary forms, with or without |
| 6 * modification, are permitted provided that the following conditions are met: |
| 7 * |
| 8 * Redistributions of source code must retain the above copyright notice, |
| 9 * this list of conditions and the following disclaimer. |
| 10 * |
| 11 * Redistributions in binary form must reproduce the above copyright notice, |
| 12 * this list of conditions and the following disclaimer in the documentation |
| 13 * and/or other materials provided with the distribution. |
| 14 * |
| 15 * Neither the name of the NVIDIA Corporation nor the names of its contributors |
| 16 * may be used to endorse or promote products derived from this software |
| 17 * without specific prior written permission. |
| 18 * |
| 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 29 * POSSIBILITY OF SUCH DAMAGE. |
| 30 * |
| 31 */ |
| 32 #ifndef PROJECT_AP15_RELOCATION_TABLE_SPEC_INC |
| 33 #define PROJECT_AP15_RELOCATION_TABLE_SPEC_INC |
| 34 |
| 35 // ------------------------------------------------------------ |
| 36 // hw nvdevids |
| 37 // ------------------------------------------------------------ |
| 38 // Memory Aperture: Internal Memory |
| 39 #define NV_DEVID_IMEM 1 |
| 40 |
| 41 // Memory Aperture: External Memory |
| 42 #define NV_DEVID_EMEM 2 |
| 43 |
| 44 // Memory Aperture: TCRAM |
| 45 #define NV_DEVID_TCRAM 3 |
| 46 |
| 47 // Memory Aperture: IRAM |
| 48 #define NV_DEVID_IRAM 4 |
| 49 |
| 50 // Memory Aperture: NOR FLASH |
| 51 #define NV_DEVID_NOR 5 |
| 52 |
| 53 // Memory Aperture: EXIO |
| 54 #define NV_DEVID_EXIO 6 |
| 55 |
| 56 // Memory Aperture: GART |
| 57 #define NV_DEVID_GART 7 |
| 58 |
| 59 // Device Aperture: Graphics Host (HOST1X) |
| 60 #define NV_DEVID_HOST1X 8 |
| 61 |
| 62 // Device Aperture: ARM PERIPH registers |
| 63 #define NV_DEVID_ARM_PERIPH 9 |
| 64 |
| 65 // Device Aperture: MSELECT |
| 66 #define NV_DEVID_MSELECT 10 |
| 67 |
| 68 // Device Aperture: memory controller |
| 69 #define NV_DEVID_MC 11 |
| 70 |
| 71 // Device Aperture: external memory controller |
| 72 #define NV_DEVID_EMC 12 |
| 73 |
| 74 // Device Aperture: video input |
| 75 #define NV_DEVID_VI 13 |
| 76 |
| 77 // Device Aperture: encoder pre-processor |
| 78 #define NV_DEVID_EPP 14 |
| 79 |
| 80 // Device Aperture: video encoder |
| 81 #define NV_DEVID_MPE 15 |
| 82 |
| 83 // Device Aperture: 3D engine |
| 84 #define NV_DEVID_GR3D 16 |
| 85 |
| 86 // Device Aperture: 2D + SBLT engine |
| 87 #define NV_DEVID_GR2D 17 |
| 88 |
| 89 // Device Aperture: Image Signal Processor |
| 90 #define NV_DEVID_ISP 18 |
| 91 |
| 92 // Device Aperture: DISPLAY |
| 93 #define NV_DEVID_DISPLAY 19 |
| 94 |
| 95 // Device Aperture: UPTAG |
| 96 #define NV_DEVID_UPTAG 20 |
| 97 |
| 98 // Device Aperture - SHR_SEM |
| 99 #define NV_DEVID_SHR_SEM 21 |
| 100 |
| 101 // Device Aperture - ARB_SEM |
| 102 #define NV_DEVID_ARB_SEM 22 |
| 103 |
| 104 // Device Aperture - ARB_PRI |
| 105 #define NV_DEVID_ARB_PRI 23 |
| 106 |
| 107 // Obsoleted for AP15 |
| 108 #define NV_DEVID_PRI_INTR 24 |
| 109 |
| 110 // Obsoleted for AP15 |
| 111 #define NV_DEVID_SEC_INTR 25 |
| 112 |
| 113 // Device Aperture: Timer Programmable |
| 114 #define NV_DEVID_TMR 26 |
| 115 |
| 116 // Device Aperture: Clock and Reset |
| 117 #define NV_DEVID_CAR 27 |
| 118 |
| 119 // Device Aperture: Flow control |
| 120 #define NV_DEVID_FLOW 28 |
| 121 |
| 122 // Device Aperture: Event |
| 123 #define NV_DEVID_EVENT 29 |
| 124 |
| 125 // Device Aperture: AHB DMA |
| 126 #define NV_DEVID_AHB_DMA 30 |
| 127 |
| 128 // Device Aperture: APB DMA |
| 129 #define NV_DEVID_APB_DMA 31 |
| 130 |
| 131 // Device Aperture: COP Cache Controller |
| 132 #define NV_DEVID_COP_CACHE 32 |
| 133 |
| 134 // Obsolete - use COP_CACHE |
| 135 #define NV_DEVID_CC 32 |
| 136 |
| 137 // Obsolete - use COP_CACHE |
| 138 #define NV_DEVID_SYS_REG 32 |
| 139 |
| 140 // Device Aperture: System Statistic monitor |
| 141 #define NV_DEVID_STAT 33 |
| 142 |
| 143 // Device Aperture: GPIO |
| 144 #define NV_DEVID_GPIO 34 |
| 145 |
| 146 // Device Aperture: Vector Co-Processor 2 |
| 147 #define NV_DEVID_VCP 35 |
| 148 |
| 149 // Device Aperture: Arm Vectors |
| 150 #define NV_DEVID_VECTOR 36 |
| 151 |
| 152 // Device: MEM |
| 153 #define NV_DEVID_MEM 37 |
| 154 |
| 155 // Obsolete - use VDE |
| 156 #define NV_DEVID_SXE 38 |
| 157 |
| 158 // Device Aperture: video decoder |
| 159 #define NV_DEVID_VDE 38 |
| 160 |
| 161 // Obsolete - use VDE |
| 162 #define NV_DEVID_BSEV 39 |
| 163 |
| 164 // Obsolete - use VDE |
| 165 #define NV_DEVID_MBE 40 |
| 166 |
| 167 // Obsolete - use VDE |
| 168 #define NV_DEVID_PPE 41 |
| 169 |
| 170 // Obsolete - use VDE |
| 171 #define NV_DEVID_MCE 42 |
| 172 |
| 173 // Obsolete - use VDE |
| 174 #define NV_DEVID_TFE 43 |
| 175 |
| 176 // Obsolete - use VDE |
| 177 #define NV_DEVID_PPB 44 |
| 178 |
| 179 // Obsolete - use VDE |
| 180 #define NV_DEVID_VDMA 45 |
| 181 |
| 182 // Obsolete - use VDE |
| 183 #define NV_DEVID_UCQ 46 |
| 184 |
| 185 // Device Aperture: BSEA (now in AVP cluster) |
| 186 #define NV_DEVID_BSEA 47 |
| 187 |
| 188 // Obsolete - use VDE |
| 189 #define NV_DEVID_FRAMEID 48 |
| 190 |
| 191 // Device Aperture: Misc regs |
| 192 #define NV_DEVID_MISC 49 |
| 193 |
| 194 // Device Aperture: AC97 |
| 195 #define NV_DEVID_AC97 50 |
| 196 |
| 197 // Device Aperture: S/P-DIF |
| 198 #define NV_DEVID_SPDIF 51 |
| 199 |
| 200 // Device Aperture: I2S |
| 201 #define NV_DEVID_I2S 52 |
| 202 |
| 203 // Device Aperture: UART |
| 204 #define NV_DEVID_UART 53 |
| 205 |
| 206 // Device Aperture: VFIR |
| 207 #define NV_DEVID_VFIR 54 |
| 208 |
| 209 // Device Aperture: NAND Flash Controller |
| 210 #define NV_DEVID_NANDCTRL 55 |
| 211 |
| 212 // Obsolete - use NANDCTRL |
| 213 #define NV_DEVID_NANDFLASH 55 |
| 214 |
| 215 // Device Aperture: HSMMC |
| 216 #define NV_DEVID_HSMMC 56 |
| 217 |
| 218 // Device Aperture: XIO |
| 219 #define NV_DEVID_XIO 57 |
| 220 |
| 221 // Device Aperture: PWFM |
| 222 #define NV_DEVID_PWFM 58 |
| 223 |
| 224 // Device Aperture: MIPI |
| 225 #define NV_DEVID_MIPI_HS 59 |
| 226 |
| 227 // Device Aperture: I2C |
| 228 #define NV_DEVID_I2C 60 |
| 229 |
| 230 // Device Aperture: TWC |
| 231 #define NV_DEVID_TWC 61 |
| 232 |
| 233 // Device Aperture: SLINK |
| 234 #define NV_DEVID_SLINK 62 |
| 235 |
| 236 // Device Aperture: SLINK4B |
| 237 #define NV_DEVID_SLINK4B 63 |
| 238 |
| 239 // Device Aperture: SPI |
| 240 #define NV_DEVID_SPI 64 |
| 241 |
| 242 // Device Aperture: DVC |
| 243 #define NV_DEVID_DVC 65 |
| 244 |
| 245 // Device Aperture: RTC |
| 246 #define NV_DEVID_RTC 66 |
| 247 |
| 248 // Device Aperture: KeyBoard Controller |
| 249 #define NV_DEVID_KBC 67 |
| 250 |
| 251 // Device Aperture: PMIF |
| 252 #define NV_DEVID_PMIF 68 |
| 253 |
| 254 // Device Aperture: FUSE |
| 255 #define NV_DEVID_FUSE 69 |
| 256 |
| 257 // Device Aperture: L2 Cache Controller |
| 258 #define NV_DEVID_CMC 70 |
| 259 |
| 260 // Device Apertuer: NOR FLASH Controller |
| 261 #define NV_DEVID_NOR_REG 71 |
| 262 |
| 263 // Device Aperture: EIDE |
| 264 #define NV_DEVID_EIDE 72 |
| 265 |
| 266 // Device Aperture: USB |
| 267 #define NV_DEVID_USB 73 |
| 268 |
| 269 // Device Aperture: SDIO |
| 270 #define NV_DEVID_SDIO 74 |
| 271 |
| 272 // Device Aperture: TVO |
| 273 #define NV_DEVID_TVO 75 |
| 274 |
| 275 // Device Aperture: DSI |
| 276 #define NV_DEVID_DSI 76 |
| 277 |
| 278 // Device Aperture: HDMI |
| 279 #define NV_DEVID_HDMI 77 |
| 280 |
| 281 // Device Aperture: Third Interrupt Controller extra registers |
| 282 #define NV_DEVID_TRI_INTR 78 |
| 283 |
| 284 // Device Aperture: Common Interrupt Controller |
| 285 #define NV_DEVID_ICTLR 79 |
| 286 |
| 287 // Non-Aperture Interrupt: DMA TX interrupts |
| 288 #define NV_DEVID_DMA_TX_INTR 80 |
| 289 |
| 290 // Non-Aperture Interrupt: DMA RX interrupts |
| 291 #define NV_DEVID_DMA_RX_INTR 81 |
| 292 |
| 293 // Non-Aperture Interrupt: SW reserved interrupt |
| 294 #define NV_DEVID_SW_INTR 82 |
| 295 |
| 296 // Non-Aperture Interrupt: CPU PMU Interrupt |
| 297 #define NV_DEVID_CPU_INTR 83 |
| 298 |
| 299 // Device Aperture: Timer Free Running MicroSecond |
| 300 #define NV_DEVID_TMRUS 84 |
| 301 |
| 302 // Device Aperture: Interrupt Controller ARB_GNT Registers |
| 303 #define NV_DEVID_ICTLR_ARBGNT 85 |
| 304 |
| 305 // Device Aperture: Interrupt Controller DMA Registers |
| 306 #define NV_DEVID_ICTLR_DRQ 86 |
| 307 |
| 308 // Device Aperture: AHB DMA Channel |
| 309 #define NV_DEVID_AHB_DMA_CH 87 |
| 310 |
| 311 // Device Aperture: APB DMA Channel |
| 312 #define NV_DEVID_APB_DMA_CH 88 |
| 313 |
| 314 // Device Aperture: AHB Arbitration Controller |
| 315 #define NV_DEVID_AHB_ARBC 89 |
| 316 |
| 317 // Obsolete - use AHB_ARBC |
| 318 #define NV_DEVID_AHB_ARB_CTRL 89 |
| 319 |
| 320 // Device Aperture: AHB/APB Debug Bus Registers |
| 321 #define NV_DEVID_AHPBDEBUG 91 |
| 322 |
| 323 // Device Aperture: Secure Boot Register |
| 324 #define NV_DEVID_SECURE_BOOT 92 |
| 325 |
| 326 // Device Aperture: SPROM |
| 327 #define NV_DEVID_SPROM 93 |
| 328 |
| 329 // Memory Aperture: AHB external memory remapping |
| 330 #define NV_DEVID_AHB_EMEM 94 |
| 331 |
| 332 // Non-Aperture Interrupt: External PMU interrupt |
| 333 #define NV_DEVID_PMU_EXT 95 |
| 334 |
| 335 // Device Aperture: AHB EMEM to MC Flush Register |
| 336 #define NV_DEVID_PPCS 96 |
| 337 |
| 338 // Device Aperture: MMU TLB registers for COP/AVP |
| 339 #define NV_DEVID_MMU_TLB 97 |
| 340 |
| 341 // Device Aperture: OVG engine |
| 342 #define NV_DEVID_VG 98 |
| 343 |
| 344 // Device Aperture: CSI |
| 345 #define NV_DEVID_CSI 99 |
| 346 |
| 347 // Device ID for COP |
| 348 #define NV_DEVID_AVP 100 |
| 349 |
| 350 // Device ID for MPCORE |
| 351 #define NV_DEVID_CPU 101 |
| 352 |
| 353 // Device Aperture: ULPI controller |
| 354 #define NV_DEVID_ULPI 102 |
| 355 |
| 356 // Device Aperture: ARM CONFIG registers |
| 357 #define NV_DEVID_ARM_CONFIG 103 |
| 358 |
| 359 // Device Aperture: ARM PL310 (L2 controller) |
| 360 #define NV_DEVID_ARM_PL310 104 |
| 361 |
| 362 // Device Aperture: PCIe |
| 363 #define NV_DEVID_PCIE 105 |
| 364 |
| 365 // Device Aperture: OWR (one wire) |
| 366 #define NV_DEVID_OWR 106 |
| 367 |
| 368 // Device Aperture: AVPUCQ |
| 369 #define NV_DEVID_AVPUCQ 107 |
| 370 |
| 371 // Device Aperture: AVPBSEA (obsolete) |
| 372 #define NV_DEVID_AVPBSEA 108 |
| 373 |
| 374 // Device Aperture: Sync NOR |
| 375 #define NV_DEVID_SNOR 109 |
| 376 |
| 377 // Device Aperture: SDMMC |
| 378 #define NV_DEVID_SDMMC 110 |
| 379 |
| 380 // Device Aperture: KFUSE |
| 381 #define NV_DEVID_KFUSE 111 |
| 382 |
| 383 // Device Aperture: CSITE |
| 384 #define NV_DEVID_CSITE 112 |
| 385 |
| 386 // Non-Aperture Interrupt: ARM Interprocessor Interrupt |
| 387 #define NV_DEVID_ARM_IPI 113 |
| 388 |
| 389 // Device Aperture: ARM Interrupts 0-31 |
| 390 #define NV_DEVID_ARM_ICTLR 114 |
| 391 |
| 392 // Device Aperture: IOBIST |
| 393 #define NV_DEVID_IOBIST 115 |
| 394 |
| 395 // Device Aperture: SPEEDO |
| 396 #define NV_DEVID_SPEEDO 116 |
| 397 |
| 398 // Device Aperture: LA |
| 399 #define NV_DEVID_LA 117 |
| 400 |
| 401 // Device Aperture: VS |
| 402 #define NV_DEVID_VS 118 |
| 403 |
| 404 // Device Aperture: VCI |
| 405 #define NV_DEVID_VCI 119 |
| 406 |
| 407 // Device Aperture: APBIF |
| 408 #define NV_DEVID_APBIF 120 |
| 409 |
| 410 // Device Aperture: AHUB |
| 411 #define NV_DEVID_AHUB 121 |
| 412 |
| 413 // Device Aperture: DAM |
| 414 #define NV_DEVID_DAM 122 |
| 415 |
| 416 // ------------------------------------------------------------ |
| 417 // hw powergroups |
| 418 // ------------------------------------------------------------ |
| 419 // Always On |
| 420 #define NV_POWERGROUP_AO 0 |
| 421 |
| 422 // Main |
| 423 #define NV_POWERGROUP_NPG 1 |
| 424 |
| 425 // CPU related blocks |
| 426 #define NV_POWERGROUP_CPU 2 |
| 427 |
| 428 // 3D graphics |
| 429 #define NV_POWERGROUP_TD 3 |
| 430 |
| 431 // Video encode engine blocks |
| 432 #define NV_POWERGROUP_VE 4 |
| 433 |
| 434 // PCIe |
| 435 #define NV_POWERGROUP_PCIE 5 |
| 436 |
| 437 // Video decoder |
| 438 #define NV_POWERGROUP_VDE 6 |
| 439 |
| 440 // MPEG encoder |
| 441 #define NV_POWERGROUP_MPE 7 |
| 442 |
| 443 // SW define for Power Group maximum |
| 444 #define NV_POWERGROUP_MAX 8 |
| 445 |
| 446 // non-mapped power group |
| 447 #define NV_POWERGROUP_INVALID 0xffff |
| 448 |
| 449 // SW table for mapping power group define to register enums (NV_POWERGROUP_INVA
LID = no mapping) |
| 450 // use as 'int table[NV_POWERGROUP_MAX] = { NV_POWERGROUP_ENUM_TABLE }' |
| 451 #define NV_POWERGROUP_ENUM_TABLE NV_POWERGROUP_INVALID, NV_POWER
GROUP_INVALID, 0, 1, 2, 3, 4, 6 |
| 452 |
| 453 // ------------------------------------------------------------ |
| 454 // relocation table data (stored in boot rom) |
| 455 // ------------------------------------------------------------ |
| 456 // relocation table pointer stored at NV_RELOCATION_TABLE_OFFSET |
| 457 #define NV_RELOCATION_TABLE_PTR_OFFSET 64 |
| 458 #define NV_RELOCATION_TABLE_SIZE 628 |
| 459 #define NV_RELOCATION_TABLE_INIT \ |
| 460 0x00000001, 0x00020010, 0x00000000, 0x40000000, 0x00711010, \ |
| 461 0x00000000, 0x00000000, 0x00711010, 0x00000000, 0x00000000, \ |
| 462 0x00711010, 0x00000000, 0x00000000, 0x00711010, 0x00000000, \ |
| 463 0x00000000, 0x00711010, 0x00000000, 0x00000000, 0x00711010, \ |
| 464 0x00000000, 0x00000000, 0x00711010, 0x00000000, 0x00000000, \ |
| 465 0x00711010, 0x00000000, 0x00000000, 0x00711010, 0x00000000, \ |
| 466 0x00000000, 0x00531010, 0x00000000, 0x00000000, 0x00711010, \ |
| 467 0x00000000, 0x00000000, 0x00711010, 0x00000000, 0x00000000, \ |
| 468 0x005f1010, 0x00000000, 0x00000000, 0x00711010, 0x00000000, \ |
| 469 0x00000000, 0x00531010, 0x00000000, 0x00000000, 0x00711010, \ |
| 470 0x00000000, 0x00000000, 0x00711010, 0x00000000, 0x00000000, \ |
| 471 0x00711010, 0x00000000, 0x00000000, 0x00711010, 0x00000000, \ |
| 472 0x00000000, 0x00521010, 0x00000000, 0x00000000, 0x00041110, \ |
| 473 0x40000000, 0x00010000, 0x00041110, 0x40010000, 0x00010000, \ |
| 474 0x00041110, 0x40020000, 0x00010000, 0x00041110, 0x40030000, \ |
| 475 0x00010000, 0x00081010, 0x50000000, 0x00024000, 0x00091020, \ |
| 476 0x50040000, 0x00002000, 0x00721020, 0x50041000, 0x00001000, \ |
| 477 0x000a1020, 0x50042000, 0x00001000, 0x00681020, 0x50043000, \ |
| 478 0x00001000, 0x000f1270, 0x54040000, 0x00040000, 0x000d1140, \ |
| 479 0x54080000, 0x00040000, 0x00631140, 0x54080000, 0x00040000, \ |
| 480 0x000e1040, 0x540c0000, 0x00040000, 0x00121040, 0x54100000, \ |
| 481 0x00040000, 0x00111010, 0x54140000, 0x00040000, 0x00101230, \ |
| 482 0x54180000, 0x00040000, 0x00131310, 0x54200000, 0x00040000, \ |
| 483 0x00131310, 0x54240000, 0x00040000, 0x004d1210, 0x54280000, \ |
| 484 0x00040000, 0x004b1110, 0x542c0000, 0x00040000, 0x004c1010, \ |
| 485 0x54300000, 0x00040000, 0x00071110, 0x58000000, 0x02000000, \ |
| 486 0x00141010, 0x60000000, 0x00001000, 0x00151010, 0x60001000, \ |
| 487 0x00001000, 0x00161010, 0x60002000, 0x00001000, 0x00171010, \ |
| 488 0x60003000, 0x00001000, 0x004f1010, 0x60004000, 0x00000040, \ |
| 489 0x00551010, 0x60004040, 0x000000c0, 0x004f1110, 0x60004100, \ |
| 490 0x00000040, 0x00561010, 0x60004140, 0x00000008, 0x00561110, \ |
| 491 0x60004148, 0x00000008, 0x004f1210, 0x60004200, 0x00000040, \ |
| 492 0x004f1310, 0x60004300, 0x00000040, 0x001a1010, 0x60005000, \ |
| 493 0x00000008, 0x001a1010, 0x60005008, 0x00000008, 0x00541010, \ |
| 494 0x60005010, 0x00000040, 0x001a1010, 0x60005050, 0x00000008, \ |
| 495 0x001a1010, 0x60005058, 0x00000008, 0x001b1210, 0x60006000, \ |
| 496 0x00001000, 0x001c1010, 0x60007000, 0x0000001c, 0x001e1110, \ |
| 497 0x60008000, 0x00002000, 0x00571010, 0x60009000, 0x00000020, \ |
| 498 0x00571010, 0x60009020, 0x00000020, 0x00571010, 0x60009040, \ |
| 499 0x00000020, 0x00571010, 0x60009060, 0x00000020, 0x001f1010, \ |
| 500 0x6000a000, 0x00002000, 0x00581010, 0x6000b000, 0x00000020, \ |
| 501 0x00581010, 0x6000b020, 0x00000020, 0x00581010, 0x6000b040, \ |
| 502 0x00000020, 0x00581010, 0x6000b060, 0x00000020, 0x00581010, \ |
| 503 0x6000b080, 0x00000020, 0x00581010, 0x6000b0a0, 0x00000020, \ |
| 504 0x00581010, 0x6000b0c0, 0x00000020, 0x00581010, 0x6000b0e0, \ |
| 505 0x00000020, 0x00581010, 0x6000b100, 0x00000020, 0x00581010, \ |
| 506 0x6000b120, 0x00000020, 0x00581010, 0x6000b140, 0x00000020, \ |
| 507 0x00581010, 0x6000b160, 0x00000020, 0x00581010, 0x6000b180, \ |
| 508 0x00000020, 0x00581010, 0x6000b1a0, 0x00000020, 0x00581010, \ |
| 509 0x6000b1c0, 0x00000020, 0x00581010, 0x6000b1e0, 0x00000020, \ |
| 510 0x00201010, 0x6000c000, 0x00000400, 0x00591010, 0x6000c004, \ |
| 511 0x0000010c, 0x005b1010, 0x6000c150, 0x000000a6, 0x005c1010, \ |
| 512 0x6000c200, 0x00000004, 0x00211010, 0x6000c400, 0x00000400, \ |
| 513 0x00222010, 0x6000d000, 0x00000880, 0x00222010, 0x6000d080, \ |
| 514 0x00000880, 0x00222010, 0x6000d100, 0x00000880, 0x00222010, \ |
| 515 0x6000d180, 0x00000880, 0x00222010, 0x6000d200, 0x00000880, \ |
| 516 0x00222010, 0x6000d280, 0x00000880, 0x00222010, 0x6000d300, \ |
| 517 0x00000880, 0x00231010, 0x6000e000, 0x00001000, 0x00241010, \ |
| 518 0x6000f000, 0x00001000, 0x006b1010, 0x60010000, 0x00000100, \ |
| 519 0x002f1110, 0x60011000, 0x00001000, 0x00261260, 0x6001a000, \ |
| 520 0x00003c00, 0x00312010, 0x70000000, 0x00001000, 0x00731010, \ |
| 521 0x70001000, 0x00000100, 0x00731010, 0x70001100, 0x00000100, \ |
| 522 0x00731010, 0x70001300, 0x00000100, 0x00731010, 0x70001400, \ |
| 523 0x00000100, 0x00731010, 0x70001800, 0x00000200, 0x00741010, \ |
| 524 0x70001f00, 0x00000008, 0x00741010, 0x70001f08, 0x00000008, \ |
| 525 0x00321110, 0x70002000, 0x00000200, 0x00331010, 0x70002400, \ |
| 526 0x00000200, 0x00341110, 0x70002800, 0x00000100, 0x00341110, \ |
| 527 0x70002a00, 0x00000100, 0x00351210, 0x70006000, 0x00000040, \ |
| 528 0x00351210, 0x70006040, 0x00000040, 0x00361010, 0x70006100, \ |
| 529 0x00000100, 0x00351210, 0x70006200, 0x00000100, 0x00351210, \ |
| 530 0x70006300, 0x00000100, 0x00351210, 0x70006400, 0x00000100, \ |
| 531 0x00371210, 0x70008000, 0x00000100, 0x00381010, 0x70008500, \ |
| 532 0x00000100, 0x00391010, 0x70008a00, 0x00000200, 0x006d1010, \ |
| 533 0x70009000, 0x00001000, 0x003a1010, 0x7000a000, 0x00000100, \ |
| 534 0x003b1010, 0x7000b000, 0x00000100, 0x003c1210, 0x7000c000, \ |
| 535 0x00000100, 0x003d1010, 0x7000c100, 0x00000100, 0x00401010, \ |
| 536 0x7000c380, 0x00000080, 0x003c1210, 0x7000c400, 0x00000100, \ |
| 537 0x003c1210, 0x7000c500, 0x00000100, 0x006a1010, 0x7000c600, \ |
| 538 0x00000050, 0x00411110, 0x7000d000, 0x00000200, 0x003e1110, \ |
| 539 0x7000d400, 0x00000200, 0x003e1110, 0x7000d600, 0x00000200, \ |
| 540 0x003e1110, 0x7000d800, 0x00000200, 0x003e1110, 0x7000da00, \ |
| 541 0x00000200, 0x00421100, 0x7000e000, 0x00000100, 0x00431100, \ |
| 542 0x7000e200, 0x00000100, 0x00441200, 0x7000e400, 0x00000200, \ |
| 543 0x000b1110, 0x7000f000, 0x00000400, 0x000c1210, 0x7000f400, \ |
| 544 0x00000400, 0x00451110, 0x7000f800, 0x00000400, 0x006f1010, \ |
| 545 0x7000fc00, 0x00000400, 0x00751010, 0x70010000, 0x00002000, \ |
| 546 0x00701010, 0x70040000, 0x00040000, 0x00691050, 0x80000000, \ |
| 547 0x40000000, 0x005e1010, 0x80000000, 0x40000000, 0x00481010, \ |
| 548 0xc3000000, 0x01000000, 0x00601010, 0xc4000000, 0x00010000, \ |
| 549 0x00491510, 0xc5000000, 0x00004000, 0x00491610, 0xc5004000, \ |
| 550 0x00004000, 0x00491710, 0xc5008000, 0x00004000, 0x006e2010, \ |
| 551 0xc8000000, 0x00000200, 0x006e2010, 0xc8000200, 0x00000200, \ |
| 552 0x006e2010, 0xc8000400, 0x00000200, 0x006e2010, 0xc8000600, \ |
| 553 0x00000200, 0x00051110, 0xd0000000, 0x10000000, 0x00060010, \ |
| 554 0xe0000000, 0x08000000, 0x00060010, 0xe8000000, 0x08000000, \ |
| 555 0x00611010, 0xf000f000, 0x00001000, 0x00000000, 0x81b00108, \ |
| 556 0x81b0020e, 0x81b00306, 0x81b0040f, 0x81b0050a, 0x81b00601, \ |
| 557 0x81b00707, 0x81b00804, 0x81b0090b, 0x83100a19, 0x81b00b0d, \ |
| 558 0x81b00c00, 0x83400d16, 0x81b00e03, 0x83100f18, 0x81b01005, \ |
| 559 0x81b01109, 0x81b01202, 0x81b0130c, 0x8340141f, 0xc3401900, \ |
| 560 0xa3401901, 0xc3401902, 0xa3401903, 0x83401e04, 0x83401f05, \ |
| 561 0x83402106, 0x83402207, 0x83402308, 0x83402509, 0x8340260a, \ |
| 562 0x8340270b, 0x8340280c, 0xa2f02c04, 0xc2f02c05, 0xc2f02c06, \ |
| 563 0xa2f02c07, 0xa2f02d1c, 0xc2f02d1d, 0x8310321e, 0x8310331f, \ |
| 564 0x82f03600, 0x82f03701, 0x83103909, 0x83103a0a, 0xa3103c0b, \ |
| 565 0xc3103c0c, 0xa2f03d1b, 0xc3103d1d, 0xa2f0421a, 0xc310421c, \ |
| 566 0x83105716, 0x83105800, 0x83105901, 0x83105a02, 0x83105b03, \ |
| 567 0x83105c17, 0x83405d17, 0x83405e19, 0x82f05f19, 0x82f06112, \ |
| 568 0x82f0620b, 0x82f06309, 0x82f0630a, 0x82f0630c, 0x82f06308, \ |
| 569 0x82f06311, 0x83406410, 0x83406418, 0x83406c11, 0x83206c00, \ |
| 570 0x83206c12, 0x83306c00, 0x83306c12, 0x83106d0d, 0x83206d03, \ |
| 571 0x83206d04, 0x83306d03, 0x83306d04, 0x82f06e0d, 0x83206e02, \ |
| 572 0x83206e01, 0x83306e01, 0x83306e02, 0x82f06f03, 0x83206f06, \ |
| 573 0x83206f05, 0x83306f05, 0x83306f06, 0x83107004, 0x83207008, \ |
| 574 0x83307008, 0x83107105, 0x83207109, 0x83307109, 0x83107214, \ |
| 575 0x83207211, 0x83307211, 0x8310730e, 0x8320730a, 0x8330730a, \ |
| 576 0x8340741a, 0x8320740e, 0x8330740e, 0x8340751b, 0x8320750f, \ |
| 577 0x8330750f, 0x82f07618, 0x82f07716, 0x82f07810, 0x83507900, \ |
| 578 0x83107b0f, 0x83107c06, 0x83207c0c, 0x83307c0c, 0x83107d08, \ |
| 579 0x83207d0b, 0x83307d0b, 0x83107e07, 0x83207e07, 0x83307e07, \ |
| 580 0x83407f14, 0x83207f0d, 0x83307f0d, 0x8340801c, 0x83208010, \ |
| 581 0x83308010, 0x82f0811e, 0x83108215, 0x8310831b, 0x83408412, \ |
| 582 0x83408513, 0x8340861d, 0x82f08702, 0x83408815, 0x83408a0d, \ |
| 583 0x83408b0e, 0x83509002, 0x83509003, 0x83509004, 0x82f09217, \ |
| 584 0x82f09414, 0x82f09515, 0x83509601, 0x82f0970e, 0x82f0980f, \ |
| 585 0x82f09913, 0x82f09a1f, 0x00000000 |
| 586 #endif |
OLD | NEW |