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1 /* | 1 /* |
2 * This file is part of the flashrom project. | 2 * This file is part of the flashrom project. |
3 * | 3 * |
4 * Copyright (C) 2008 Stefan Wildemann <stefan.wildemann@kontron.com> | 4 * Copyright (C) 2008 Stefan Wildemann <stefan.wildemann@kontron.com> |
5 * Copyright (C) 2008 Claus Gindhart <claus.gindhart@kontron.com> | 5 * Copyright (C) 2008 Claus Gindhart <claus.gindhart@kontron.com> |
6 * Copyright (C) 2008 Dominik Geyer <dominik.geyer@kontron.com> | 6 * Copyright (C) 2008 Dominik Geyer <dominik.geyer@kontron.com> |
7 * Copyright (C) 2008 coresystems GmbH <info@coresystems.de> | 7 * Copyright (C) 2008 coresystems GmbH <info@coresystems.de> |
8 * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger | 8 * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger |
9 * | 9 * |
10 * This program is free software; you can redistribute it and/or modify | 10 * This program is free software; you can redistribute it and/or modify |
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181 * encounter unlisted opcodes. Fun. | 181 * encounter unlisted opcodes. Fun. |
182 */ | 182 */ |
183 static OPCODES O_ST_M25P = { | 183 static OPCODES O_ST_M25P = { |
184 { | 184 { |
185 JEDEC_WREN, | 185 JEDEC_WREN, |
186 JEDEC_EWSR, | 186 JEDEC_EWSR, |
187 }, | 187 }, |
188 { | 188 { |
189 {JEDEC_BYTE_PROGRAM, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, 0}, // Write
Byte | 189 {JEDEC_BYTE_PROGRAM, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, 0}, // Write
Byte |
190 {JEDEC_READ, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, 0}, // Read Data | 190 {JEDEC_READ, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, 0}, // Read Data |
191 » {JEDEC_BE_D8, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, 0},» // Erase Sector | 191 » {JEDEC_SE, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, 0},» // Erase Sector |
192 {JEDEC_RDSR, SPI_OPCODE_TYPE_READ_NO_ADDRESS, 0}, // Read Device S
tatus Reg | 192 {JEDEC_RDSR, SPI_OPCODE_TYPE_READ_NO_ADDRESS, 0}, // Read Device S
tatus Reg |
193 {JEDEC_REMS, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, 0}, // Read Electron
ic Manufacturer Signature | 193 {JEDEC_REMS, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, 0}, // Read Electron
ic Manufacturer Signature |
194 {JEDEC_WRSR, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, 0}, // Write Status
Register | 194 {JEDEC_WRSR, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, 0}, // Write Status
Register |
195 {JEDEC_RDID, SPI_OPCODE_TYPE_READ_NO_ADDRESS, 0}, // Read JDEC ID | 195 {JEDEC_RDID, SPI_OPCODE_TYPE_READ_NO_ADDRESS, 0}, // Read JDEC ID |
196 {JEDEC_CE_C7, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, 0}, // Bulk erase | 196 {JEDEC_CE_C7, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, 0}, // Bulk erase |
197 } | 197 } |
198 }; | 198 }; |
199 | 199 |
200 static OPCODES O_EXISTING = {}; | 200 static OPCODES O_EXISTING = {}; |
201 | 201 |
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1065 | 1065 |
1066 /* Not sure if it speaks all these bus protocols. */ | 1066 /* Not sure if it speaks all these bus protocols. */ |
1067 buses_supported = CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH | CHIP_BUSTYPE_SPI
; | 1067 buses_supported = CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH | CHIP_BUSTYPE_SPI
; |
1068 spi_controller = SPI_CONTROLLER_VIA; | 1068 spi_controller = SPI_CONTROLLER_VIA; |
1069 ich_init_opcodes(); | 1069 ich_init_opcodes(); |
1070 | 1070 |
1071 return 0; | 1071 return 0; |
1072 } | 1072 } |
1073 | 1073 |
1074 #endif | 1074 #endif |
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