Index: src/mips/assembler-mips.cc |
diff --git a/src/mips/assembler-mips.cc b/src/mips/assembler-mips.cc |
index 6716ecda9656b8887cdece9e695ab2ba18f8d7ab..97aed6b552a83606ad9613b727dae17d43952cd3 100644 |
--- a/src/mips/assembler-mips.cc |
+++ b/src/mips/assembler-mips.cc |
@@ -1185,7 +1185,7 @@ void Assembler::jal_or_jalr(int32_t target, Register rs) { |
} |
-//-------Data-processing-instructions--------- |
+// -------Data-processing-instructions--------- |
// Arithmetic. |
@@ -1328,7 +1328,7 @@ void Assembler::rotrv(Register rd, Register rt, Register rs) { |
} |
-//------------Memory-instructions------------- |
+// ------------Memory-instructions------------- |
// Helper for base-reg + offset, when offset is larger than int16. |
void Assembler::LoadRegPlusOffsetToAt(const MemOperand& src) { |
@@ -1445,7 +1445,7 @@ void Assembler::lui(Register rd, int32_t j) { |
} |
-//-------------Misc-instructions-------------- |
+// -------------Misc-instructions-------------- |
// Break / Trap instructions. |
void Assembler::break_(uint32_t code, bool break_as_stop) { |
@@ -1618,7 +1618,7 @@ void Assembler::pref(int32_t hint, const MemOperand& rs) { |
} |
-//--------Coprocessor-instructions---------------- |
+// --------Coprocessor-instructions---------------- |
// Load, store, move. |
void Assembler::lwc1(FPURegister fd, const MemOperand& src) { |