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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
| 6 // met: | 6 // met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 639 | 639 |
| 640 // Jump targets must be in the current 256 MB-aligned region. i.e. 28 bits. | 640 // Jump targets must be in the current 256 MB-aligned region. i.e. 28 bits. |
| 641 void j(int32_t target); | 641 void j(int32_t target); |
| 642 void jal(int32_t target); | 642 void jal(int32_t target); |
| 643 void jalr(Register rs, Register rd = ra); | 643 void jalr(Register rs, Register rd = ra); |
| 644 void jr(Register target); | 644 void jr(Register target); |
| 645 void j_or_jr(int32_t target, Register rs); | 645 void j_or_jr(int32_t target, Register rs); |
| 646 void jal_or_jalr(int32_t target, Register rs); | 646 void jal_or_jalr(int32_t target, Register rs); |
| 647 | 647 |
| 648 | 648 |
| 649 //-------Data-processing-instructions--------- | 649 // -------Data-processing-instructions--------- |
| 650 | 650 |
| 651 // Arithmetic. | 651 // Arithmetic. |
| 652 void addu(Register rd, Register rs, Register rt); | 652 void addu(Register rd, Register rs, Register rt); |
| 653 void subu(Register rd, Register rs, Register rt); | 653 void subu(Register rd, Register rs, Register rt); |
| 654 void mult(Register rs, Register rt); | 654 void mult(Register rs, Register rt); |
| 655 void multu(Register rs, Register rt); | 655 void multu(Register rs, Register rt); |
| 656 void div(Register rs, Register rt); | 656 void div(Register rs, Register rt); |
| 657 void divu(Register rs, Register rt); | 657 void divu(Register rs, Register rt); |
| 658 void mul(Register rd, Register rs, Register rt); | 658 void mul(Register rd, Register rs, Register rt); |
| 659 | 659 |
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| 677 void sll(Register rd, Register rt, uint16_t sa, bool coming_from_nop = false); | 677 void sll(Register rd, Register rt, uint16_t sa, bool coming_from_nop = false); |
| 678 void sllv(Register rd, Register rt, Register rs); | 678 void sllv(Register rd, Register rt, Register rs); |
| 679 void srl(Register rd, Register rt, uint16_t sa); | 679 void srl(Register rd, Register rt, uint16_t sa); |
| 680 void srlv(Register rd, Register rt, Register rs); | 680 void srlv(Register rd, Register rt, Register rs); |
| 681 void sra(Register rt, Register rd, uint16_t sa); | 681 void sra(Register rt, Register rd, uint16_t sa); |
| 682 void srav(Register rt, Register rd, Register rs); | 682 void srav(Register rt, Register rd, Register rs); |
| 683 void rotr(Register rd, Register rt, uint16_t sa); | 683 void rotr(Register rd, Register rt, uint16_t sa); |
| 684 void rotrv(Register rd, Register rt, Register rs); | 684 void rotrv(Register rd, Register rt, Register rs); |
| 685 | 685 |
| 686 | 686 |
| 687 //------------Memory-instructions------------- | 687 // ------------Memory-instructions------------- |
| 688 | 688 |
| 689 void lb(Register rd, const MemOperand& rs); | 689 void lb(Register rd, const MemOperand& rs); |
| 690 void lbu(Register rd, const MemOperand& rs); | 690 void lbu(Register rd, const MemOperand& rs); |
| 691 void lh(Register rd, const MemOperand& rs); | 691 void lh(Register rd, const MemOperand& rs); |
| 692 void lhu(Register rd, const MemOperand& rs); | 692 void lhu(Register rd, const MemOperand& rs); |
| 693 void lw(Register rd, const MemOperand& rs); | 693 void lw(Register rd, const MemOperand& rs); |
| 694 void lwl(Register rd, const MemOperand& rs); | 694 void lwl(Register rd, const MemOperand& rs); |
| 695 void lwr(Register rd, const MemOperand& rs); | 695 void lwr(Register rd, const MemOperand& rs); |
| 696 void sb(Register rd, const MemOperand& rs); | 696 void sb(Register rd, const MemOperand& rs); |
| 697 void sh(Register rd, const MemOperand& rs); | 697 void sh(Register rd, const MemOperand& rs); |
| 698 void sw(Register rd, const MemOperand& rs); | 698 void sw(Register rd, const MemOperand& rs); |
| 699 void swl(Register rd, const MemOperand& rs); | 699 void swl(Register rd, const MemOperand& rs); |
| 700 void swr(Register rd, const MemOperand& rs); | 700 void swr(Register rd, const MemOperand& rs); |
| 701 | 701 |
| 702 | 702 |
| 703 //----------------Prefetch-------------------- | 703 // ----------------Prefetch-------------------- |
| 704 | 704 |
| 705 void pref(int32_t hint, const MemOperand& rs); | 705 void pref(int32_t hint, const MemOperand& rs); |
| 706 | 706 |
| 707 | 707 |
| 708 //-------------Misc-instructions-------------- | 708 // -------------Misc-instructions-------------- |
| 709 | 709 |
| 710 // Break / Trap instructions. | 710 // Break / Trap instructions. |
| 711 void break_(uint32_t code, bool break_as_stop = false); | 711 void break_(uint32_t code, bool break_as_stop = false); |
| 712 void stop(const char* msg, uint32_t code = kMaxStopCode); | 712 void stop(const char* msg, uint32_t code = kMaxStopCode); |
| 713 void tge(Register rs, Register rt, uint16_t code); | 713 void tge(Register rs, Register rt, uint16_t code); |
| 714 void tgeu(Register rs, Register rt, uint16_t code); | 714 void tgeu(Register rs, Register rt, uint16_t code); |
| 715 void tlt(Register rs, Register rt, uint16_t code); | 715 void tlt(Register rs, Register rt, uint16_t code); |
| 716 void tltu(Register rs, Register rt, uint16_t code); | 716 void tltu(Register rs, Register rt, uint16_t code); |
| 717 void teq(Register rs, Register rt, uint16_t code); | 717 void teq(Register rs, Register rt, uint16_t code); |
| 718 void tne(Register rs, Register rt, uint16_t code); | 718 void tne(Register rs, Register rt, uint16_t code); |
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| 731 void movz(Register rd, Register rs, Register rt); | 731 void movz(Register rd, Register rs, Register rt); |
| 732 void movn(Register rd, Register rs, Register rt); | 732 void movn(Register rd, Register rs, Register rt); |
| 733 void movt(Register rd, Register rs, uint16_t cc = 0); | 733 void movt(Register rd, Register rs, uint16_t cc = 0); |
| 734 void movf(Register rd, Register rs, uint16_t cc = 0); | 734 void movf(Register rd, Register rs, uint16_t cc = 0); |
| 735 | 735 |
| 736 // Bit twiddling. | 736 // Bit twiddling. |
| 737 void clz(Register rd, Register rs); | 737 void clz(Register rd, Register rs); |
| 738 void ins_(Register rt, Register rs, uint16_t pos, uint16_t size); | 738 void ins_(Register rt, Register rs, uint16_t pos, uint16_t size); |
| 739 void ext_(Register rt, Register rs, uint16_t pos, uint16_t size); | 739 void ext_(Register rt, Register rs, uint16_t pos, uint16_t size); |
| 740 | 740 |
| 741 //--------Coprocessor-instructions---------------- | 741 // --------Coprocessor-instructions---------------- |
| 742 | 742 |
| 743 // Load, store, and move. | 743 // Load, store, and move. |
| 744 void lwc1(FPURegister fd, const MemOperand& src); | 744 void lwc1(FPURegister fd, const MemOperand& src); |
| 745 void ldc1(FPURegister fd, const MemOperand& src); | 745 void ldc1(FPURegister fd, const MemOperand& src); |
| 746 | 746 |
| 747 void swc1(FPURegister fs, const MemOperand& dst); | 747 void swc1(FPURegister fs, const MemOperand& dst); |
| 748 void sdc1(FPURegister fs, const MemOperand& dst); | 748 void sdc1(FPURegister fs, const MemOperand& dst); |
| 749 | 749 |
| 750 void mtc1(Register rt, FPURegister fs); | 750 void mtc1(Register rt, FPURegister fs); |
| 751 void mfc1(Register rt, FPURegister fs); | 751 void mfc1(Register rt, FPURegister fs); |
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| 1234 class EnsureSpace BASE_EMBEDDED { | 1234 class EnsureSpace BASE_EMBEDDED { |
| 1235 public: | 1235 public: |
| 1236 explicit EnsureSpace(Assembler* assembler) { | 1236 explicit EnsureSpace(Assembler* assembler) { |
| 1237 assembler->CheckBuffer(); | 1237 assembler->CheckBuffer(); |
| 1238 } | 1238 } |
| 1239 }; | 1239 }; |
| 1240 | 1240 |
| 1241 } } // namespace v8::internal | 1241 } } // namespace v8::internal |
| 1242 | 1242 |
| 1243 #endif // V8_ARM_ASSEMBLER_MIPS_H_ | 1243 #endif // V8_ARM_ASSEMBLER_MIPS_H_ |
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