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Issue 317663002: Rename InvertCondition and ReverseConditionForCmp on arm64 to be consistent with the other ports. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 6 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/v8.h" 5 #include "src/v8.h"
6 6
7 #if V8_TARGET_ARCH_ARM64 7 #if V8_TARGET_ARCH_ARM64
8 8
9 #include "src/bootstrapper.h" 9 #include "src/bootstrapper.h"
10 #include "src/codegen.h" 10 #include "src/codegen.h"
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654 654
655 void MacroAssembler::B(Label* label, Condition cond) { 655 void MacroAssembler::B(Label* label, Condition cond) {
656 ASSERT(allow_macro_instructions_); 656 ASSERT(allow_macro_instructions_);
657 ASSERT((cond != al) && (cond != nv)); 657 ASSERT((cond != al) && (cond != nv));
658 658
659 Label done; 659 Label done;
660 bool need_extra_instructions = 660 bool need_extra_instructions =
661 NeedExtraInstructionsOrRegisterBranch(label, CondBranchType); 661 NeedExtraInstructionsOrRegisterBranch(label, CondBranchType);
662 662
663 if (need_extra_instructions) { 663 if (need_extra_instructions) {
664 b(&done, InvertCondition(cond)); 664 b(&done, NegateCondition(cond));
665 B(label); 665 B(label);
666 } else { 666 } else {
667 b(label, cond); 667 b(label, cond);
668 } 668 }
669 bind(&done); 669 bind(&done);
670 } 670 }
671 671
672 672
673 void MacroAssembler::Tbnz(const Register& rt, unsigned bit_pos, Label* label) { 673 void MacroAssembler::Tbnz(const Register& rt, unsigned bit_pos, Label* label) {
674 ASSERT(allow_macro_instructions_); 674 ASSERT(allow_macro_instructions_);
(...skipping 3144 matching lines...) Expand 10 before | Expand all | Expand 10 after
3819 Label* if_true, 3819 Label* if_true,
3820 Label* if_false, 3820 Label* if_false,
3821 Label* fall_through) { 3821 Label* fall_through) {
3822 if ((if_true == if_false) && (if_false == fall_through)) { 3822 if ((if_true == if_false) && (if_false == fall_through)) {
3823 // Fall through. 3823 // Fall through.
3824 } else if (if_true == if_false) { 3824 } else if (if_true == if_false) {
3825 B(if_true); 3825 B(if_true);
3826 } else if (if_false == fall_through) { 3826 } else if (if_false == fall_through) {
3827 CompareAndBranch(lhs, rhs, cond, if_true); 3827 CompareAndBranch(lhs, rhs, cond, if_true);
3828 } else if (if_true == fall_through) { 3828 } else if (if_true == fall_through) {
3829 CompareAndBranch(lhs, rhs, InvertCondition(cond), if_false); 3829 CompareAndBranch(lhs, rhs, NegateCondition(cond), if_false);
3830 } else { 3830 } else {
3831 CompareAndBranch(lhs, rhs, cond, if_true); 3831 CompareAndBranch(lhs, rhs, cond, if_true);
3832 B(if_false); 3832 B(if_false);
3833 } 3833 }
3834 } 3834 }
3835 3835
3836 3836
3837 void MacroAssembler::TestAndSplit(const Register& reg, 3837 void MacroAssembler::TestAndSplit(const Register& reg,
3838 uint64_t bit_pattern, 3838 uint64_t bit_pattern,
3839 Label* if_all_clear, 3839 Label* if_all_clear,
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5292 } 5292 }
5293 } 5293 }
5294 5294
5295 5295
5296 #undef __ 5296 #undef __
5297 5297
5298 5298
5299 } } // namespace v8::internal 5299 } } // namespace v8::internal
5300 5300
5301 #endif // V8_TARGET_ARCH_ARM64 5301 #endif // V8_TARGET_ARCH_ARM64
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