Rename InvertCondition and ReverseConditionForCmp on arm64 to be consistent with the other ports.

src/arm64/lithium-codegen-arm64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/v8.h"
 
 #include "src/arm64/lithium-codegen-arm64.h"
 #include "src/arm64/lithium-gap-resolver-arm64.h"
 #include "src/code-stubs.h"
 #include "src/stub-cache.h"
@@ skipping 38 matching lines @@
   BranchOnCondition(LCodeGen* codegen, Condition cond)
     : BranchGenerator(codegen),
       cond_(cond) { }
 
   virtual void Emit(Label* label) const {
     __ B(cond_, label);
   }
 
   virtual void EmitInverted(Label* label) const {
     if (cond_ != al) {
-      __ B(InvertCondition(cond_), label);
+      __ B(NegateCondition(cond_), label);
     }
   }
 
  private:
   Condition cond_;
 };
 
 
 // Emit code to compare lhs and rhs and branch if the condition holds.
 // This uses MacroAssembler's CompareAndBranch function so it will handle
 // converting the comparison to Cbz/Cbnz if the right-hand side is 0.
 //
 // EmitInverted still compares the two operands but inverts the condition.
 class CompareAndBranch : public BranchGenerator {
  public:
   CompareAndBranch(LCodeGen* codegen,
                    Condition cond,
                    const Register& lhs,
                    const Operand& rhs)
     : BranchGenerator(codegen),
       cond_(cond),
       lhs_(lhs),
       rhs_(rhs) { }
 
   virtual void Emit(Label* label) const {
     __ CompareAndBranch(lhs_, rhs_, cond_, label);
   }
 
   virtual void EmitInverted(Label* label) const {
-    __ CompareAndBranch(lhs_, rhs_, InvertCondition(cond_), label);
+    __ CompareAndBranch(lhs_, rhs_, NegateCondition(cond_), label);
   }
 
  private:
   Condition cond_;
   const Register& lhs_;
   const Operand& rhs_;
 };
 
 
 // Test the input with the given mask and branch if the condition holds.
@@ skipping 29 matching lines @@
     // The inverse of "all clear" is "any set" and vice versa.
     switch (cond_) {
       case eq:
         __ TestAndBranchIfAnySet(value_, mask_, label);
         break;
       case ne:
         __ TestAndBranchIfAllClear(value_, mask_, label);
         break;
       default:
         __ Tst(value_, mask_);
-        __ B(InvertCondition(cond_), label);
+        __ B(NegateCondition(cond_), label);
     }
   }
 
  private:
   Condition cond_;
   const Register& value_;
   uint64_t mask_;
 };
 
 
@@ skipping 1691 matching lines @@
 
 
 void LCodeGen::DoBoundsCheck(LBoundsCheck *instr) {
   Condition cond = instr->hydrogen()->allow_equality() ? hi : hs;
   ASSERT(instr->hydrogen()->index()->representation().IsInteger32());
   ASSERT(instr->hydrogen()->length()->representation().IsInteger32());
   if (instr->index()->IsConstantOperand()) {
     Operand index = ToOperand32I(instr->index());
     Register length = ToRegister32(instr->length());
     __ Cmp(length, index);
-    cond = ReverseConditionForCmp(cond);
+    cond = ReverseCondition(cond);
   } else {
     Register index = ToRegister32(instr->index());
     Operand length = ToOperand32I(instr->length());
     __ Cmp(index, length);
   }
   if (FLAG_debug_code && instr->hydrogen()->skip_check()) {
-    __ Assert(InvertCondition(cond), kEliminatedBoundsCheckFailed);
+    __ Assert(NegateCondition(cond), kEliminatedBoundsCheckFailed);
   } else {
     DeoptimizeIf(cond, instr->environment());
   }
 }
 
 
 void LCodeGen::DoBranch(LBranch* instr) {
   Representation r = instr->hydrogen()->value()->representation();
   Label* true_label = instr->TrueLabel(chunk_);
   Label* false_label = instr->FalseLabel(chunk_);
@@ skipping 613 matching lines @@
     EmitGoto(next_block);
   } else {
     if (instr->is_double()) {
       if (right->IsConstantOperand()) {
         __ Fcmp(ToDoubleRegister(left),
                 ToDouble(LConstantOperand::cast(right)));
       } else if (left->IsConstantOperand()) {
         // Transpose the operands and reverse the condition.
         __ Fcmp(ToDoubleRegister(right),
                 ToDouble(LConstantOperand::cast(left)));
-        cond = ReverseConditionForCmp(cond);
+        cond = ReverseCondition(cond);
       } else {
         __ Fcmp(ToDoubleRegister(left), ToDoubleRegister(right));
       }
 
       // If a NaN is involved, i.e. the result is unordered (V set),
       // jump to false block label.
       __ B(vs, instr->FalseLabel(chunk_));
       EmitBranch(instr, cond);
     } else {
       if (instr->hydrogen_value()->representation().IsInteger32()) {
         if (right->IsConstantOperand()) {
           EmitCompareAndBranch(instr,
                                cond,
                                ToRegister32(left),
                                ToOperand32I(right));
         } else {
           // Transpose the operands and reverse the condition.
           EmitCompareAndBranch(instr,
-                               ReverseConditionForCmp(cond),
+                               ReverseCondition(cond),
                                ToRegister32(right),
                                ToOperand32I(left));
         }
       } else {
         ASSERT(instr->hydrogen_value()->representation().IsSmi());
         if (right->IsConstantOperand()) {
           int32_t value = ToInteger32(LConstantOperand::cast(right));
           EmitCompareAndBranch(instr,
                                cond,
                                ToRegister(left),
                                Operand(Smi::FromInt(value)));
         } else if (left->IsConstantOperand()) {
           // Transpose the operands and reverse the condition.
           int32_t value = ToInteger32(LConstantOperand::cast(left));
           EmitCompareAndBranch(instr,
-                               ReverseConditionForCmp(cond),
+                               ReverseCondition(cond),
                                ToRegister(right),
                                Operand(Smi::FromInt(value)));
         } else {
           EmitCompareAndBranch(instr,
                                cond,
                                ToRegister(left),
                                ToRegister(right));
         }
       }
     }
@@ skipping 3495 matching lines @@
   __ Ldr(result, FieldMemOperand(object, JSObject::kPropertiesOffset));
   // Index is equal to negated out of object property index plus 1.
   __ Sub(result, result, Operand::UntagSmiAndScale(index, kPointerSizeLog2));
   __ Ldr(result, FieldMemOperand(result,
                                  FixedArray::kHeaderSize - kPointerSize));
   __ Bind(deferred->exit());
   __ Bind(&done);
 }
 
 } }  // namespace v8::internal