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Side by Side Diff: src/arm64/disasm-arm64.cc

Issue 317663002: Rename InvertCondition and ReverseConditionForCmp on arm64 to be consistent with the other ports. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 6 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <assert.h> 5 #include <assert.h>
6 #include <stdio.h> 6 #include <stdio.h>
7 #include <stdarg.h> 7 #include <stdarg.h>
8 #include <string.h> 8 #include <string.h>
9 9
10 #include "src/v8.h" 10 #include "src/v8.h"
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1552 const char* format) { 1552 const char* format) {
1553 ASSERT(format[0] == 'C'); 1553 ASSERT(format[0] == 'C');
1554 const char* condition_code[] = { "eq", "ne", "hs", "lo", 1554 const char* condition_code[] = { "eq", "ne", "hs", "lo",
1555 "mi", "pl", "vs", "vc", 1555 "mi", "pl", "vs", "vc",
1556 "hi", "ls", "ge", "lt", 1556 "hi", "ls", "ge", "lt",
1557 "gt", "le", "al", "nv" }; 1557 "gt", "le", "al", "nv" };
1558 int cond; 1558 int cond;
1559 switch (format[1]) { 1559 switch (format[1]) {
1560 case 'B': cond = instr->ConditionBranch(); break; 1560 case 'B': cond = instr->ConditionBranch(); break;
1561 case 'I': { 1561 case 'I': {
1562 cond = InvertCondition(static_cast<Condition>(instr->Condition())); 1562 cond = NegateCondition(static_cast<Condition>(instr->Condition()));
1563 break; 1563 break;
1564 } 1564 }
1565 default: cond = instr->Condition(); 1565 default: cond = instr->Condition();
1566 } 1566 }
1567 AppendToOutput("%s", condition_code[cond]); 1567 AppendToOutput("%s", condition_code[cond]);
1568 return 4; 1568 return 4;
1569 } 1569 }
1570 1570
1571 1571
1572 int Disassembler::SubstitutePCRelAddressField(Instruction* instr, 1572 int Disassembler::SubstitutePCRelAddressField(Instruction* instr,
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1823 decoder.AppendVisitor(&disasm); 1823 decoder.AppendVisitor(&disasm);
1824 1824
1825 for (byte* pc = start; pc < end; pc += v8::internal::kInstructionSize) { 1825 for (byte* pc = start; pc < end; pc += v8::internal::kInstructionSize) {
1826 decoder.Decode(reinterpret_cast<v8::internal::Instruction*>(pc)); 1826 decoder.Decode(reinterpret_cast<v8::internal::Instruction*>(pc));
1827 } 1827 }
1828 } 1828 }
1829 1829
1830 } // namespace disasm 1830 } // namespace disasm
1831 1831
1832 #endif // V8_TARGET_ARCH_ARM64 1832 #endif // V8_TARGET_ARCH_ARM64
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