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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_ARM_CONSTANTS_ARM_H_ | 5 #ifndef V8_ARM_CONSTANTS_ARM_H_ |
6 #define V8_ARM_CONSTANTS_ARM_H_ | 6 #define V8_ARM_CONSTANTS_ARM_H_ |
7 | 7 |
8 // ARM EABI is required. | 8 // ARM EABI is required. |
9 #if defined(__arm__) && !defined(__ARM_EABI__) | 9 #if defined(__arm__) && !defined(__ARM_EABI__) |
10 #error ARM EABI support is required. | 10 #error ARM EABI support is required. |
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399 // Branch hints are not used on the ARM. They are defined so that they can | 399 // Branch hints are not used on the ARM. They are defined so that they can |
400 // appear in shared function signatures, but will be ignored in ARM | 400 // appear in shared function signatures, but will be ignored in ARM |
401 // implementations. | 401 // implementations. |
402 enum Hint { no_hint }; | 402 enum Hint { no_hint }; |
403 | 403 |
404 // Hints are not used on the arm. Negating is trivial. | 404 // Hints are not used on the arm. Negating is trivial. |
405 inline Hint NegateHint(Hint ignored) { return no_hint; } | 405 inline Hint NegateHint(Hint ignored) { return no_hint; } |
406 | 406 |
407 | 407 |
408 // ----------------------------------------------------------------------------- | 408 // ----------------------------------------------------------------------------- |
409 // Specific instructions, constants, and masks. | |
410 // These constants are declared in assembler-arm.cc, as they use named registers | |
411 // and other constants. | |
412 | |
413 | |
414 // add(sp, sp, 4) instruction (aka Pop()) | |
415 extern const Instr kPopInstruction; | |
416 | |
417 // str(r, MemOperand(sp, 4, NegPreIndex), al) instruction (aka push(r)) | |
418 // register r is not encoded. | |
419 extern const Instr kPushRegPattern; | |
420 | |
421 // ldr(r, MemOperand(sp, 4, PostIndex), al) instruction (aka pop(r)) | |
422 // register r is not encoded. | |
423 extern const Instr kPopRegPattern; | |
424 | |
425 // mov lr, pc | |
426 extern const Instr kMovLrPc; | |
427 // ldr rd, [pc, #offset] | |
428 extern const Instr kLdrPCMask; | |
429 extern const Instr kLdrPCPattern; | |
430 // vldr dd, [pc, #offset] | |
431 extern const Instr kVldrDPCMask; | |
432 extern const Instr kVldrDPCPattern; | |
433 // blxcc rm | |
434 extern const Instr kBlxRegMask; | |
435 | |
436 extern const Instr kBlxRegPattern; | |
437 | |
438 extern const Instr kMovMvnMask; | |
439 extern const Instr kMovMvnPattern; | |
440 extern const Instr kMovMvnFlip; | |
441 extern const Instr kMovLeaveCCMask; | |
442 extern const Instr kMovLeaveCCPattern; | |
443 extern const Instr kMovwMask; | |
444 extern const Instr kMovwPattern; | |
445 extern const Instr kMovwLeaveCCFlip; | |
446 extern const Instr kCmpCmnMask; | |
447 extern const Instr kCmpCmnPattern; | |
448 extern const Instr kCmpCmnFlip; | |
449 extern const Instr kAddSubFlip; | |
450 extern const Instr kAndBicFlip; | |
451 | |
452 // A mask for the Rd register for push, pop, ldr, str instructions. | |
453 extern const Instr kLdrRegFpOffsetPattern; | |
454 | |
455 extern const Instr kStrRegFpOffsetPattern; | |
456 | |
457 extern const Instr kLdrRegFpNegOffsetPattern; | |
458 | |
459 extern const Instr kStrRegFpNegOffsetPattern; | |
460 | |
461 extern const Instr kLdrStrInstrTypeMask; | |
462 extern const Instr kLdrStrInstrArgumentMask; | |
463 extern const Instr kLdrStrOffsetMask; | |
464 | |
465 | |
466 // ----------------------------------------------------------------------------- | |
467 // Instruction abstraction. | 409 // Instruction abstraction. |
468 | 410 |
469 // The class Instruction enables access to individual fields defined in the ARM | 411 // The class Instruction enables access to individual fields defined in the ARM |
470 // architecture instruction set encoding as described in figure A3-1. | 412 // architecture instruction set encoding as described in figure A3-1. |
471 // Note that the Assembler uses typedef int32_t Instr. | 413 // Note that the Assembler uses typedef int32_t Instr. |
472 // | 414 // |
473 // Example: Test whether the instruction at ptr does set the condition code | 415 // Example: Test whether the instruction at ptr does set the condition code |
474 // bits. | 416 // bits. |
475 // | 417 // |
476 // bool InstructionSetsConditionCodes(byte* ptr) { | 418 // bool InstructionSetsConditionCodes(byte* ptr) { |
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741 static int Number(const char* name, bool* is_double); | 683 static int Number(const char* name, bool* is_double); |
742 | 684 |
743 private: | 685 private: |
744 static const char* names_[kNumVFPRegisters]; | 686 static const char* names_[kNumVFPRegisters]; |
745 }; | 687 }; |
746 | 688 |
747 | 689 |
748 } } // namespace v8::internal | 690 } } // namespace v8::internal |
749 | 691 |
750 #endif // V8_ARM_CONSTANTS_ARM_H_ | 692 #endif // V8_ARM_CONSTANTS_ARM_H_ |
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