Move atomic ops and related files to base library

src/x64/disasm-x64.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <assert.h>
 #include <stdio.h>
 #include <stdarg.h>
 
 #include "src/v8.h"
 
 #if V8_TARGET_ARCH_X64
 
+#include "src/base/lazy-instance.h"
 #include "src/disasm.h"
-#include "src/lazy-instance.h"
 
 namespace disasm {
 
 enum OperandType {
   UNSET_OP_ORDER = 0,
   // Operand size decides between 16, 32 and 64 bit operands.
   REG_OPER_OP_ORDER = 1,  // Register destination, operand source.
   OPER_REG_OP_ORDER = 2,  // Operand destination, register source.
   // Fixed 8-bit operands.
   BYTE_SIZE_OPERAND_FLAG = 4,
@@ skipping 216 matching lines @@
 void InstructionTable::AddJumpConditionalShort() {
   for (byte b = 0x70; b <= 0x7F; b++) {
     InstructionDesc* id = &instructions_[b];
     ASSERT_EQ(NO_INSTR, id->type);  // Information not already entered
     id->mnem = NULL;  // Computed depending on condition code.
     id->type = JUMP_CONDITIONAL_SHORT_INSTR;
   }
 }
 
 
-static v8::internal::LazyInstance<InstructionTable>::type instruction_table =
+static v8::base::LazyInstance<InstructionTable>::type instruction_table =
     LAZY_INSTANCE_INITIALIZER;
 
 
 static InstructionDesc cmov_instructions[16] = {
   {"cmovo", TWO_OPERANDS_INSTR, REG_OPER_OP_ORDER, false},
   {"cmovno", TWO_OPERANDS_INSTR, REG_OPER_OP_ORDER, false},
   {"cmovc", TWO_OPERANDS_INSTR, REG_OPER_OP_ORDER, false},
   {"cmovnc", TWO_OPERANDS_INSTR, REG_OPER_OP_ORDER, false},
   {"cmovz", TWO_OPERANDS_INSTR, REG_OPER_OP_ORDER, false},
   {"cmovnz", TWO_OPERANDS_INSTR, REG_OPER_OP_ORDER, false},
@@ skipping 1641 matching lines @@
     for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) {
       fprintf(f, "  ");
     }
     fprintf(f, "  %s\n", buffer.start());
   }
 }
 
 }  // namespace disasm
 
 #endif  // V8_TARGET_ARCH_X64