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Side by Side Diff: src/base/atomicops_internals_x86_gcc.h

Issue 316133002: Move atomic ops and related files to base library (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: updates Created 6 years, 6 months ago
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1 // Copyright 2010 the V8 project authors. All rights reserved. 1 // Copyright 2010 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 // This file is an internal atomic implementation, use atomicops.h instead. 5 // This file is an internal atomic implementation, use atomicops.h instead.
6 6
7 #ifndef V8_ATOMICOPS_INTERNALS_X86_GCC_H_ 7 #ifndef V8_BASE_ATOMICOPS_INTERNALS_X86_GCC_H_
8 #define V8_ATOMICOPS_INTERNALS_X86_GCC_H_ 8 #define V8_BASE_ATOMICOPS_INTERNALS_X86_GCC_H_
9 9
10 namespace v8 { 10 namespace v8 {
11 namespace internal { 11 namespace base {
12 12
13 // This struct is not part of the public API of this module; clients may not 13 // This struct is not part of the public API of this module; clients may not
14 // use it. 14 // use it.
15 // Features of this x86. Values may not be correct before main() is run, 15 // Features of this x86. Values may not be correct before main() is run,
16 // but are set conservatively. 16 // but are set conservatively.
17 struct AtomicOps_x86CPUFeatureStruct { 17 struct AtomicOps_x86CPUFeatureStruct {
18 bool has_amd_lock_mb_bug; // Processor has AMD memory-barrier bug; do lfence 18 bool has_amd_lock_mb_bug; // Processor has AMD memory-barrier bug; do lfence
19 // after acquire compare-and-swap. 19 // after acquire compare-and-swap.
20 bool has_sse2; // Processor has SSE2. 20 bool has_sse2; // Processor has SSE2.
21 }; 21 };
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258 } 258 }
259 259
260 inline Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr, 260 inline Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr,
261 Atomic64 old_value, 261 Atomic64 old_value,
262 Atomic64 new_value) { 262 Atomic64 new_value) {
263 return NoBarrier_CompareAndSwap(ptr, old_value, new_value); 263 return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
264 } 264 }
265 265
266 #endif // defined(__x86_64__) 266 #endif // defined(__x86_64__)
267 267
268 } } // namespace v8::internal 268 } } // namespace v8::base
269 269
270 #undef ATOMICOPS_COMPILER_BARRIER 270 #undef ATOMICOPS_COMPILER_BARRIER
271 271
272 #endif // V8_ATOMICOPS_INTERNALS_X86_GCC_H_ 272 #endif // V8_BASE_ATOMICOPS_INTERNALS_X86_GCC_H_
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