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Side by Side Diff: src/base/atomicops_internals_x86_gcc.cc

Issue 316133002: Move atomic ops and related files to base library (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: updates Created 6 years, 6 months ago
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1 // Copyright 2010 the V8 project authors. All rights reserved. 1 // Copyright 2010 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 // This module gets enough CPU information to optimize the 5 // This module gets enough CPU information to optimize the
6 // atomicops module on x86. 6 // atomicops module on x86.
7 7
8 #include <string.h> 8 #include <string.h>
9 9
10 #include "src/atomicops.h" 10 #include "src/base/atomicops.h"
11 11
12 // This file only makes sense with atomicops_internals_x86_gcc.h -- it 12 // This file only makes sense with atomicops_internals_x86_gcc.h -- it
13 // depends on structs that are defined in that file. If atomicops.h 13 // depends on structs that are defined in that file. If atomicops.h
14 // doesn't sub-include that file, then we aren't needed, and shouldn't 14 // doesn't sub-include that file, then we aren't needed, and shouldn't
15 // try to do anything. 15 // try to do anything.
16 #ifdef V8_ATOMICOPS_INTERNALS_X86_GCC_H_ 16 #ifdef V8_BASE_ATOMICOPS_INTERNALS_X86_GCC_H_
17 17
18 // Inline cpuid instruction. In PIC compilations, %ebx contains the address 18 // Inline cpuid instruction. In PIC compilations, %ebx contains the address
19 // of the global offset table. To avoid breaking such executables, this code 19 // of the global offset table. To avoid breaking such executables, this code
20 // must preserve that register's value across cpuid instructions. 20 // must preserve that register's value across cpuid instructions.
21 #if defined(__i386__) 21 #if defined(__i386__)
22 #define cpuid(a, b, c, d, inp) \ 22 #define cpuid(a, b, c, d, inp) \
23 asm("mov %%ebx, %%edi\n" \ 23 asm("mov %%ebx, %%edi\n" \
24 "cpuid\n" \ 24 "cpuid\n" \
25 "xchg %%edi, %%ebx\n" \ 25 "xchg %%edi, %%ebx\n" \
26 : "=a" (a), "=D" (b), "=c" (c), "=d" (d) : "a" (inp)) 26 : "=a" (a), "=D" (b), "=c" (c), "=d" (d) : "a" (inp))
27 #elif defined(__x86_64__) 27 #elif defined(__x86_64__)
28 #define cpuid(a, b, c, d, inp) \ 28 #define cpuid(a, b, c, d, inp) \
29 asm("mov %%rbx, %%rdi\n" \ 29 asm("mov %%rbx, %%rdi\n" \
30 "cpuid\n" \ 30 "cpuid\n" \
31 "xchg %%rdi, %%rbx\n" \ 31 "xchg %%rdi, %%rbx\n" \
32 : "=a" (a), "=D" (b), "=c" (c), "=d" (d) : "a" (inp)) 32 : "=a" (a), "=D" (b), "=c" (c), "=d" (d) : "a" (inp))
33 #endif 33 #endif
34 34
35 #if defined(cpuid) // initialize the struct only on x86 35 #if defined(cpuid) // initialize the struct only on x86
36 36
37 namespace v8 { 37 namespace v8 {
38 namespace internal { 38 namespace base {
39 39
40 // Set the flags so that code will run correctly and conservatively, so even 40 // Set the flags so that code will run correctly and conservatively, so even
41 // if we haven't been initialized yet, we're probably single threaded, and our 41 // if we haven't been initialized yet, we're probably single threaded, and our
42 // default values should hopefully be pretty safe. 42 // default values should hopefully be pretty safe.
43 struct AtomicOps_x86CPUFeatureStruct AtomicOps_Internalx86CPUFeatures = { 43 struct AtomicOps_x86CPUFeatureStruct AtomicOps_Internalx86CPUFeatures = {
44 false, // bug can't exist before process spawns multiple threads 44 false, // bug can't exist before process spawns multiple threads
45 false, // no SSE2 45 false, // no SSE2
46 }; 46 };
47 47
48 } } // namespace v8::internal 48 } } // namespace v8::base
49 49
50 namespace { 50 namespace {
51 51
52 // Initialize the AtomicOps_Internalx86CPUFeatures struct. 52 // Initialize the AtomicOps_Internalx86CPUFeatures struct.
53 void AtomicOps_Internalx86CPUFeaturesInit() { 53 void AtomicOps_Internalx86CPUFeaturesInit() {
54 using v8::internal::AtomicOps_Internalx86CPUFeatures; 54 using v8::base::AtomicOps_Internalx86CPUFeatures;
55 55
56 uint32_t eax = 0; 56 uint32_t eax = 0;
57 uint32_t ebx = 0; 57 uint32_t ebx = 0;
58 uint32_t ecx = 0; 58 uint32_t ecx = 0;
59 uint32_t edx = 0; 59 uint32_t edx = 0;
60 60
61 // Get vendor string (issue CPUID with eax = 0) 61 // Get vendor string (issue CPUID with eax = 0)
62 cpuid(eax, ebx, ecx, edx, 0); 62 cpuid(eax, ebx, ecx, edx, 0);
63 char vendor[13]; 63 char vendor[13];
64 memcpy(vendor, &ebx, 4); 64 memcpy(vendor, &ebx, 4);
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101 }; 101 };
102 102
103 103
104 // A global to get use initialized on startup via static initialization :/ 104 // A global to get use initialized on startup via static initialization :/
105 AtomicOpsx86Initializer g_initer; 105 AtomicOpsx86Initializer g_initer;
106 106
107 } // namespace 107 } // namespace
108 108
109 #endif // if x86 109 #endif // if x86
110 110
111 #endif // ifdef V8_ATOMICOPS_INTERNALS_X86_GCC_H_ 111 #endif // ifdef V8_BASE_ATOMICOPS_INTERNALS_X86_GCC_H_
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