Add LoadTaggedClassIdMayBeSmi to assembly and improve performance of inline cache stubs.

runtime/vm/flow_graph_compiler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM.
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/flow_graph_compiler.h"
 
 #include "vm/ast_printer.h"
@@ skipping 1218 matching lines @@
     intptr_t deopt_id,
     intptr_t token_pos,
     LocationSummary* locs) {
   MegamorphicCacheTable* table = Isolate::Current()->megamorphic_cache_table();
   const String& name = String::Handle(ic_data.target_name());
   const Array& arguments_descriptor =
       Array::ZoneHandle(ic_data.arguments_descriptor());
   ASSERT(!arguments_descriptor.IsNull() && (arguments_descriptor.Length() > 0));
   const MegamorphicCache& cache =
       MegamorphicCache::ZoneHandle(table->Lookup(name, arguments_descriptor));
-  Label not_smi, load_cache;
   __ LoadFromOffset(kWord, R0, SP, (argument_count - 1) * kWordSize);
-  __ tst(R0, Operand(kSmiTagMask));
-  __ b(&not_smi, NE);
-  __ mov(R0, Operand(Smi::RawValue(kSmiCid)));
-  __ b(&load_cache);
-
-  __ Bind(&not_smi);
-  __ LoadClassId(R0, R0);
-  __ SmiTag(R0);
+  __ LoadTaggedClassIdMayBeSmi(R0, R0);
 
   // R0: class ID of the receiver (smi).
-  __ Bind(&load_cache);
   __ LoadObject(R1, cache);
   __ ldr(R2, FieldAddress(R1, MegamorphicCache::buckets_offset()));
   __ ldr(R1, FieldAddress(R1, MegamorphicCache::mask_offset()));
   // R2: cache buckets array.
   // R1: mask.
   __ mov(R3, Operand(R0));
 
   Label loop, update, call_target_function;
   __ b(&loop);
 
@@ skipping 512 matching lines @@
   DRegister dreg = EvenDRegisterOf(reg);
   __ vldrd(dreg, Address(SP, kDoubleSize, Address::PostIndex));
 }
 
 
 #undef __
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM