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Side by Side Diff: runtime/vm/stub_code_mips.cc

Issue 311963002: In class Function replace current code field with current instruction field, that way we save one l… (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 6 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/code_generator.h" 9 #include "vm/code_generator.h"
10 #include "vm/compiler.h" 10 #include "vm/compiler.h"
(...skipping 652 matching lines...) Expand 10 before | Expand all | Expand 10 after
663 663
664 __ CallRuntime(kMegamorphicCacheMissHandlerRuntimeEntry, 3); 664 __ CallRuntime(kMegamorphicCacheMissHandlerRuntimeEntry, 3);
665 665
666 __ lw(T0, Address(SP, 3 * kWordSize)); // Get result function. 666 __ lw(T0, Address(SP, 3 * kWordSize)); // Get result function.
667 __ lw(S4, Address(SP, 4 * kWordSize)); // Restore argument descriptor. 667 __ lw(S4, Address(SP, 4 * kWordSize)); // Restore argument descriptor.
668 __ lw(S5, Address(SP, 5 * kWordSize)); // Restore IC data. 668 __ lw(S5, Address(SP, 5 * kWordSize)); // Restore IC data.
669 __ addiu(SP, SP, Immediate(6 * kWordSize)); 669 __ addiu(SP, SP, Immediate(6 * kWordSize));
670 670
671 __ LeaveStubFrame(); 671 __ LeaveStubFrame();
672 672
673 __ lw(T2, FieldAddress(T0, Function::code_offset())); 673 __ lw(T2, FieldAddress(T0, Function::instructions_offset()));
674 __ lw(T2, FieldAddress(T2, Code::instructions_offset()));
675 __ AddImmediate(T2, Instructions::HeaderSize() - kHeapObjectTag); 674 __ AddImmediate(T2, Instructions::HeaderSize() - kHeapObjectTag);
676 __ jr(T2); 675 __ jr(T2);
677 } 676 }
678 677
679 678
680 // Called for inline allocation of arrays. 679 // Called for inline allocation of arrays.
681 // Input parameters: 680 // Input parameters:
682 // RA: return address. 681 // RA: return address.
683 // A1: Array length as Smi (must be preserved). 682 // A1: Array length as Smi (must be preserved).
684 // A0: array element type (either NULL or an instantiated type). 683 // A0: array element type (either NULL or an instantiated type).
(...skipping 878 matching lines...) Expand 10 before | Expand all | Expand 10 after
1563 __ bgez(T5, &call_target_function); // No overflow. 1562 __ bgez(T5, &call_target_function); // No overflow.
1564 __ delay_slot()->sw(T4, Address(T0, count_offset)); 1563 __ delay_slot()->sw(T4, Address(T0, count_offset));
1565 1564
1566 __ LoadImmediate(T1, Smi::RawValue(Smi::kMaxValue)); 1565 __ LoadImmediate(T1, Smi::RawValue(Smi::kMaxValue));
1567 __ sw(T1, Address(T0, count_offset)); 1566 __ sw(T1, Address(T0, count_offset));
1568 1567
1569 __ Bind(&call_target_function); 1568 __ Bind(&call_target_function);
1570 // T0 <- T3: Target function. 1569 // T0 <- T3: Target function.
1571 __ mov(T0, T3); 1570 __ mov(T0, T3);
1572 Label is_compiled; 1571 Label is_compiled;
1573 __ lw(T4, FieldAddress(T0, Function::code_offset())); 1572 __ lw(T4, FieldAddress(T0, Function::instructions_offset()));
1574 __ lw(T4, FieldAddress(T4, Code::instructions_offset()));
1575 __ AddImmediate(T4, Instructions::HeaderSize() - kHeapObjectTag); 1573 __ AddImmediate(T4, Instructions::HeaderSize() - kHeapObjectTag);
1576 __ jr(T4); 1574 __ jr(T4);
1577 1575
1578 // Instance in T3, return its class-id in T3 as Smi. 1576 // Instance in T3, return its class-id in T3 as Smi.
1579 __ Bind(&get_class_id_as_smi); 1577 __ Bind(&get_class_id_as_smi);
1580 Label not_smi; 1578 Label not_smi;
1581 // Test if Smi -> load Smi class for comparison. 1579 // Test if Smi -> load Smi class for comparison.
1582 __ andi(CMPRES1, T3, Immediate(kSmiTagMask)); 1580 __ andi(CMPRES1, T3, Immediate(kSmiTagMask));
1583 __ bne(CMPRES1, ZR, &not_smi); 1581 __ bne(CMPRES1, ZR, &not_smi);
1584 __ jr(RA); 1582 __ jr(RA);
(...skipping 123 matching lines...) Expand 10 before | Expand all | Expand 10 after
1708 __ LoadImmediate(T1, Smi::RawValue(Smi::kMaxValue)); 1706 __ LoadImmediate(T1, Smi::RawValue(Smi::kMaxValue));
1709 __ sw(T1, Address(T0, count_offset)); 1707 __ sw(T1, Address(T0, count_offset));
1710 1708
1711 __ Bind(&increment_done); 1709 __ Bind(&increment_done);
1712 1710
1713 // Load arguments descriptor into S4. 1711 // Load arguments descriptor into S4.
1714 __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset())); 1712 __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset()));
1715 1713
1716 // Get function and call it, if possible. 1714 // Get function and call it, if possible.
1717 __ lw(T0, Address(T0, target_offset)); 1715 __ lw(T0, Address(T0, target_offset));
1718 __ lw(T4, FieldAddress(T0, Function::code_offset())); 1716 __ lw(T4, FieldAddress(T0, Function::instructions_offset()));
1719 1717
1720 // T4: target code. 1718 // T4: target instructions.
1721 __ lw(T4, FieldAddress(T4, Code::instructions_offset()));
1722 __ AddImmediate(T4, Instructions::HeaderSize() - kHeapObjectTag); 1719 __ AddImmediate(T4, Instructions::HeaderSize() - kHeapObjectTag);
1723 __ jr(T4); 1720 __ jr(T4);
1724 } 1721 }
1725 1722
1726 1723
1727 void StubCode::GenerateTwoArgsUnoptimizedStaticCallStub(Assembler* assembler) { 1724 void StubCode::GenerateTwoArgsUnoptimizedStaticCallStub(Assembler* assembler) {
1728 GenerateUsageCounterIncrement(assembler, T0); 1725 GenerateUsageCounterIncrement(assembler, T0);
1729 GenerateNArgsCheckInlineCacheStub( 1726 GenerateNArgsCheckInlineCacheStub(
1730 assembler, 2, kStaticCallMissHandlerTwoArgsRuntimeEntry); 1727 assembler, 2, kStaticCallMissHandlerTwoArgsRuntimeEntry);
1731 } 1728 }
1732 1729
1733 1730
1734 // Stub for compiling a function and jumping to the compiled code. 1731 // Stub for compiling a function and jumping to the compiled code.
1735 // S5: IC-Data (for methods). 1732 // S5: IC-Data (for methods).
1736 // S4: Arguments descriptor. 1733 // S4: Arguments descriptor.
1737 // T0: Function. 1734 // T0: Function.
1738 void StubCode::GenerateLazyCompileStub(Assembler* assembler) { 1735 void StubCode::GenerateLazyCompileStub(Assembler* assembler) {
1739 __ EnterStubFrame(); 1736 __ EnterStubFrame();
1740 __ addiu(SP, SP, Immediate(-3 * kWordSize)); 1737 __ addiu(SP, SP, Immediate(-3 * kWordSize));
1741 __ sw(S5, Address(SP, 2 * kWordSize)); // Preserve IC data object. 1738 __ sw(S5, Address(SP, 2 * kWordSize)); // Preserve IC data object.
1742 __ sw(S4, Address(SP, 1 * kWordSize)); // Preserve args descriptor array. 1739 __ sw(S4, Address(SP, 1 * kWordSize)); // Preserve args descriptor array.
1743 __ sw(T0, Address(SP, 0 * kWordSize)); // Pass function. 1740 __ sw(T0, Address(SP, 0 * kWordSize)); // Pass function.
1744 __ CallRuntime(kCompileFunctionRuntimeEntry, 1); 1741 __ CallRuntime(kCompileFunctionRuntimeEntry, 1);
1745 __ lw(T0, Address(SP, 0 * kWordSize)); // Restore function. 1742 __ lw(T0, Address(SP, 0 * kWordSize)); // Restore function.
1746 __ lw(S4, Address(SP, 1 * kWordSize)); // Restore args descriptor array. 1743 __ lw(S4, Address(SP, 1 * kWordSize)); // Restore args descriptor array.
1747 __ lw(S5, Address(SP, 2 * kWordSize)); // Restore IC data array. 1744 __ lw(S5, Address(SP, 2 * kWordSize)); // Restore IC data array.
1748 __ addiu(SP, SP, Immediate(3 * kWordSize)); 1745 __ addiu(SP, SP, Immediate(3 * kWordSize));
1749 __ LeaveStubFrame(); 1746 __ LeaveStubFrame();
1750 1747
1751 __ lw(T2, FieldAddress(T0, Function::code_offset())); 1748 __ lw(T2, FieldAddress(T0, Function::instructions_offset()));
1752 __ lw(T2, FieldAddress(T2, Code::instructions_offset()));
1753 __ AddImmediate(T2, Instructions::HeaderSize() - kHeapObjectTag); 1749 __ AddImmediate(T2, Instructions::HeaderSize() - kHeapObjectTag);
1754 __ jr(T2); 1750 __ jr(T2);
1755 } 1751 }
1756 1752
1757 1753
1758 void StubCode::GenerateBreakpointRuntimeStub(Assembler* assembler) { 1754 void StubCode::GenerateBreakpointRuntimeStub(Assembler* assembler) {
1759 __ Comment("BreakpointRuntime stub"); 1755 __ Comment("BreakpointRuntime stub");
1760 __ EnterStubFrame(); 1756 __ EnterStubFrame();
1761 __ addiu(SP, SP, Immediate(-3 * kWordSize)); 1757 __ addiu(SP, SP, Immediate(-3 * kWordSize));
1762 __ sw(S5, Address(SP, 2 * kWordSize)); 1758 __ sw(S5, Address(SP, 2 * kWordSize));
(...skipping 333 matching lines...) Expand 10 before | Expand all | Expand 10 after
2096 const Register right = T0; 2092 const Register right = T0;
2097 __ lw(left, Address(SP, 1 * kWordSize)); 2093 __ lw(left, Address(SP, 1 * kWordSize));
2098 __ lw(right, Address(SP, 0 * kWordSize)); 2094 __ lw(right, Address(SP, 0 * kWordSize));
2099 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2); 2095 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2);
2100 __ Ret(); 2096 __ Ret();
2101 } 2097 }
2102 2098
2103 } // namespace dart 2099 } // namespace dart
2104 2100
2105 #endif // defined TARGET_ARCH_MIPS 2101 #endif // defined TARGET_ARCH_MIPS
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