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| 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/disassembler.h" | 5 #include "vm/disassembler.h" |
| 6 | 6 |
| 7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM64. | 7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM64. |
| 8 #if defined(TARGET_ARCH_ARM64) | 8 #if defined(TARGET_ARCH_ARM64) |
| 9 #include "platform/assert.h" | 9 #include "platform/assert.h" |
| 10 | 10 |
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| 80 buffer_[buffer_pos_] = '\0'; | 80 buffer_[buffer_pos_] = '\0'; |
| 81 } | 81 } |
| 82 | 82 |
| 83 | 83 |
| 84 // These register names are defined in a way to match the native disassembler | 84 // These register names are defined in a way to match the native disassembler |
| 85 // formatting, except for register aliases ctx (r9) and pp (r10). | 85 // formatting, except for register aliases ctx (r9) and pp (r10). |
| 86 // See for example the command "objdump -d <binary file>". | 86 // See for example the command "objdump -d <binary file>". |
| 87 static const char* reg_names[kNumberOfCpuRegisters] = { | 87 static const char* reg_names[kNumberOfCpuRegisters] = { |
| 88 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | 88 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
| 89 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | 89 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", |
| 90 "ip0", "ip1", "r18", "r19", "r20", "r21", "r22", "r23", | 90 "ip0", "ip1", "sp", "r19", "r20", "r21", "r22", "r23", |
| 91 "r24", "r25", "r26", "pp", "ctx", "fp", "lr", "r31", | 91 "r24", "r25", "r26", "pp", "ctx", "fp", "lr", "r31", |
| 92 }; | 92 }; |
| 93 | 93 |
| 94 | 94 |
| 95 // Print the register name according to the active name converter. | 95 // Print the register name according to the active name converter. |
| 96 void ARM64Decoder::PrintRegister(int reg, R31Type r31t) { | 96 void ARM64Decoder::PrintRegister(int reg, R31Type r31t) { |
| 97 ASSERT(0 <= reg); | 97 ASSERT(0 <= reg); |
| 98 ASSERT(reg < kNumberOfCpuRegisters); | 98 ASSERT(reg < kNumberOfCpuRegisters); |
| 99 if (reg == 31) { | 99 if (reg == 31) { |
| 100 const char* rstr = (r31t == R31IsZR) ? "zr" : "sp"; | 100 const char* rstr = (r31t == R31IsZR) ? "zr" : "csp"; |
| 101 Print(rstr); | 101 Print(rstr); |
| 102 } else { | 102 } else { |
| 103 Print(reg_names[reg]); | 103 Print(reg_names[reg]); |
| 104 } | 104 } |
| 105 } | 105 } |
| 106 | 106 |
| 107 | 107 |
| 108 void ARM64Decoder::PrintVRegister(int reg) { | 108 void ARM64Decoder::PrintVRegister(int reg) { |
| 109 ASSERT(0 <= reg); | 109 ASSERT(0 <= reg); |
| 110 ASSERT(reg < kNumberOfVRegisters); | 110 ASSERT(reg < kNumberOfVRegisters); |
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| 1386 human_buffer, | 1386 human_buffer, |
| 1387 sizeof(human_buffer), | 1387 sizeof(human_buffer), |
| 1388 pc); | 1388 pc); |
| 1389 pc += instruction_length; | 1389 pc += instruction_length; |
| 1390 } | 1390 } |
| 1391 } | 1391 } |
| 1392 | 1392 |
| 1393 } // namespace dart | 1393 } // namespace dart |
| 1394 | 1394 |
| 1395 #endif // defined TARGET_ARCH_ARM | 1395 #endif // defined TARGET_ARCH_ARM |
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