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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <limits.h> | 5 #include <limits.h> |
6 #include <stdarg.h> | 6 #include <stdarg.h> |
7 #include <stdlib.h> | 7 #include <stdlib.h> |
8 #include <cmath> | 8 #include <cmath> |
9 | 9 |
10 #include "v8.h" | 10 #include "v8.h" |
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838 char* cache_valid_byte = cache_page->ValidityByte(offset); | 838 char* cache_valid_byte = cache_page->ValidityByte(offset); |
839 bool cache_hit = (*cache_valid_byte == CachePage::LINE_VALID); | 839 bool cache_hit = (*cache_valid_byte == CachePage::LINE_VALID); |
840 char* cached_line = cache_page->CachedData(offset & ~CachePage::kLineMask); | 840 char* cached_line = cache_page->CachedData(offset & ~CachePage::kLineMask); |
841 if (cache_hit) { | 841 if (cache_hit) { |
842 // Check that the data in memory matches the contents of the I-cache. | 842 // Check that the data in memory matches the contents of the I-cache. |
843 CHECK_EQ(0, memcmp(reinterpret_cast<void*>(instr), | 843 CHECK_EQ(0, memcmp(reinterpret_cast<void*>(instr), |
844 cache_page->CachedData(offset), | 844 cache_page->CachedData(offset), |
845 Instruction::kInstrSize)); | 845 Instruction::kInstrSize)); |
846 } else { | 846 } else { |
847 // Cache miss. Load memory into the cache. | 847 // Cache miss. Load memory into the cache. |
848 OS::MemCopy(cached_line, line, CachePage::kLineLength); | 848 MemCopy(cached_line, line, CachePage::kLineLength); |
849 *cache_valid_byte = CachePage::LINE_VALID; | 849 *cache_valid_byte = CachePage::LINE_VALID; |
850 } | 850 } |
851 } | 851 } |
852 | 852 |
853 | 853 |
854 void Simulator::Initialize(Isolate* isolate) { | 854 void Simulator::Initialize(Isolate* isolate) { |
855 if (isolate->simulator_initialized()) return; | 855 if (isolate->simulator_initialized()) return; |
856 isolate->set_simulator_initialized(true); | 856 isolate->set_simulator_initialized(true); |
857 ::v8::internal::ExternalReference::set_redirector(isolate, | 857 ::v8::internal::ExternalReference::set_redirector(isolate, |
858 &RedirectExternalReference); | 858 &RedirectExternalReference); |
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1040 } | 1040 } |
1041 | 1041 |
1042 | 1042 |
1043 double Simulator::get_double_from_register_pair(int reg) { | 1043 double Simulator::get_double_from_register_pair(int reg) { |
1044 ASSERT((reg >= 0) && (reg < kNumSimuRegisters) && ((reg % 2) == 0)); | 1044 ASSERT((reg >= 0) && (reg < kNumSimuRegisters) && ((reg % 2) == 0)); |
1045 | 1045 |
1046 double dm_val = 0.0; | 1046 double dm_val = 0.0; |
1047 // Read the bits from the unsigned integer register_[] array | 1047 // Read the bits from the unsigned integer register_[] array |
1048 // into the double precision floating point value and return it. | 1048 // into the double precision floating point value and return it. |
1049 char buffer[2 * sizeof(registers_[0])]; | 1049 char buffer[2 * sizeof(registers_[0])]; |
1050 OS::MemCopy(buffer, ®isters_[reg], 2 * sizeof(registers_[0])); | 1050 MemCopy(buffer, ®isters_[reg], 2 * sizeof(registers_[0])); |
1051 OS::MemCopy(&dm_val, buffer, 2 * sizeof(registers_[0])); | 1051 MemCopy(&dm_val, buffer, 2 * sizeof(registers_[0])); |
1052 return(dm_val); | 1052 return(dm_val); |
1053 } | 1053 } |
1054 | 1054 |
1055 | 1055 |
1056 int32_t Simulator::get_fpu_register(int fpureg) const { | 1056 int32_t Simulator::get_fpu_register(int fpureg) const { |
1057 ASSERT((fpureg >= 0) && (fpureg < kNumFPURegisters)); | 1057 ASSERT((fpureg >= 0) && (fpureg < kNumFPURegisters)); |
1058 return FPUregisters_[fpureg]; | 1058 return FPUregisters_[fpureg]; |
1059 } | 1059 } |
1060 | 1060 |
1061 | 1061 |
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1089 *z = get_register(a2); | 1089 *z = get_register(a2); |
1090 } else { | 1090 } else { |
1091 // We use a char buffer to get around the strict-aliasing rules which | 1091 // We use a char buffer to get around the strict-aliasing rules which |
1092 // otherwise allow the compiler to optimize away the copy. | 1092 // otherwise allow the compiler to optimize away the copy. |
1093 char buffer[sizeof(*x)]; | 1093 char buffer[sizeof(*x)]; |
1094 int32_t* reg_buffer = reinterpret_cast<int32_t*>(buffer); | 1094 int32_t* reg_buffer = reinterpret_cast<int32_t*>(buffer); |
1095 | 1095 |
1096 // Registers a0 and a1 -> x. | 1096 // Registers a0 and a1 -> x. |
1097 reg_buffer[0] = get_register(a0); | 1097 reg_buffer[0] = get_register(a0); |
1098 reg_buffer[1] = get_register(a1); | 1098 reg_buffer[1] = get_register(a1); |
1099 OS::MemCopy(x, buffer, sizeof(buffer)); | 1099 MemCopy(x, buffer, sizeof(buffer)); |
1100 // Registers a2 and a3 -> y. | 1100 // Registers a2 and a3 -> y. |
1101 reg_buffer[0] = get_register(a2); | 1101 reg_buffer[0] = get_register(a2); |
1102 reg_buffer[1] = get_register(a3); | 1102 reg_buffer[1] = get_register(a3); |
1103 OS::MemCopy(y, buffer, sizeof(buffer)); | 1103 MemCopy(y, buffer, sizeof(buffer)); |
1104 // Register 2 -> z. | 1104 // Register 2 -> z. |
1105 reg_buffer[0] = get_register(a2); | 1105 reg_buffer[0] = get_register(a2); |
1106 OS::MemCopy(z, buffer, sizeof(*z)); | 1106 MemCopy(z, buffer, sizeof(*z)); |
1107 } | 1107 } |
1108 } | 1108 } |
1109 | 1109 |
1110 | 1110 |
1111 // The return value is either in v0/v1 or f0. | 1111 // The return value is either in v0/v1 or f0. |
1112 void Simulator::SetFpResult(const double& result) { | 1112 void Simulator::SetFpResult(const double& result) { |
1113 if (!IsMipsSoftFloatABI) { | 1113 if (!IsMipsSoftFloatABI) { |
1114 set_fpu_register_double(0, result); | 1114 set_fpu_register_double(0, result); |
1115 } else { | 1115 } else { |
1116 char buffer[2 * sizeof(registers_[0])]; | 1116 char buffer[2 * sizeof(registers_[0])]; |
1117 int32_t* reg_buffer = reinterpret_cast<int32_t*>(buffer); | 1117 int32_t* reg_buffer = reinterpret_cast<int32_t*>(buffer); |
1118 OS::MemCopy(buffer, &result, sizeof(buffer)); | 1118 MemCopy(buffer, &result, sizeof(buffer)); |
1119 // Copy result to v0 and v1. | 1119 // Copy result to v0 and v1. |
1120 set_register(v0, reg_buffer[0]); | 1120 set_register(v0, reg_buffer[0]); |
1121 set_register(v1, reg_buffer[1]); | 1121 set_register(v1, reg_buffer[1]); |
1122 } | 1122 } |
1123 } | 1123 } |
1124 | 1124 |
1125 | 1125 |
1126 // Helper functions for setting and testing the FCSR register's bits. | 1126 // Helper functions for setting and testing the FCSR register's bits. |
1127 void Simulator::set_fcsr_bit(uint32_t cc, bool value) { | 1127 void Simulator::set_fcsr_bit(uint32_t cc, bool value) { |
1128 if (value) { | 1128 if (value) { |
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2880 } | 2880 } |
2881 | 2881 |
2882 | 2882 |
2883 double Simulator::CallFP(byte* entry, double d0, double d1) { | 2883 double Simulator::CallFP(byte* entry, double d0, double d1) { |
2884 if (!IsMipsSoftFloatABI) { | 2884 if (!IsMipsSoftFloatABI) { |
2885 set_fpu_register_double(f12, d0); | 2885 set_fpu_register_double(f12, d0); |
2886 set_fpu_register_double(f14, d1); | 2886 set_fpu_register_double(f14, d1); |
2887 } else { | 2887 } else { |
2888 int buffer[2]; | 2888 int buffer[2]; |
2889 ASSERT(sizeof(buffer[0]) * 2 == sizeof(d0)); | 2889 ASSERT(sizeof(buffer[0]) * 2 == sizeof(d0)); |
2890 OS::MemCopy(buffer, &d0, sizeof(d0)); | 2890 MemCopy(buffer, &d0, sizeof(d0)); |
2891 set_dw_register(a0, buffer); | 2891 set_dw_register(a0, buffer); |
2892 OS::MemCopy(buffer, &d1, sizeof(d1)); | 2892 MemCopy(buffer, &d1, sizeof(d1)); |
2893 set_dw_register(a2, buffer); | 2893 set_dw_register(a2, buffer); |
2894 } | 2894 } |
2895 CallInternal(entry); | 2895 CallInternal(entry); |
2896 if (!IsMipsSoftFloatABI) { | 2896 if (!IsMipsSoftFloatABI) { |
2897 return get_fpu_register_double(f0); | 2897 return get_fpu_register_double(f0); |
2898 } else { | 2898 } else { |
2899 return get_double_from_register_pair(v0); | 2899 return get_double_from_register_pair(v0); |
2900 } | 2900 } |
2901 } | 2901 } |
2902 | 2902 |
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2919 } | 2919 } |
2920 | 2920 |
2921 | 2921 |
2922 #undef UNSUPPORTED | 2922 #undef UNSUPPORTED |
2923 | 2923 |
2924 } } // namespace v8::internal | 2924 } } // namespace v8::internal |
2925 | 2925 |
2926 #endif // USE_SIMULATOR | 2926 #endif // USE_SIMULATOR |
2927 | 2927 |
2928 #endif // V8_TARGET_ARCH_MIPS | 2928 #endif // V8_TARGET_ARCH_MIPS |
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