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1 //===- subzero/src/IceTargetLoweringX8632.h - x86-32 lowering ---*- C++ -*-===// | 1 //===- subzero/src/IceTargetLoweringX8632.h - x86-32 lowering ---*- C++ -*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // This file declares the TargetLoweringX8632 class, which | 10 // This file declares the TargetLoweringX8632 class, which |
11 // implements the TargetLowering interface for the x86-32 | 11 // implements the TargetLowering interface for the x86-32 |
12 // architecture. | 12 // architecture. |
13 // | 13 // |
14 //===----------------------------------------------------------------------===// | 14 //===----------------------------------------------------------------------===// |
15 | 15 |
16 #ifndef SUBZERO_SRC_ICETARGETLOWERINGX8632_H | 16 #ifndef SUBZERO_SRC_ICETARGETLOWERINGX8632_H |
17 #define SUBZERO_SRC_ICETARGETLOWERINGX8632_H | 17 #define SUBZERO_SRC_ICETARGETLOWERINGX8632_H |
18 | 18 |
19 #include "IceDefs.h" | 19 #include "IceDefs.h" |
20 #include "IceTargetLowering.h" | 20 #include "IceTargetLowering.h" |
21 #include "IceInstX8632.h" | 21 #include "IceInstX8632.h" |
22 | 22 |
23 namespace Ice { | 23 namespace Ice { |
24 | 24 |
25 class TargetX8632 : public TargetLowering { | 25 class TargetX8632 : public TargetLowering { |
26 public: | 26 public: |
27 static TargetX8632 *create(Cfg *Func) { return new TargetX8632(Func); } | 27 static TargetX8632 *create(Cfg *Func) { return new TargetX8632(Func); } |
28 | 28 |
29 virtual void translateOm1(); | 29 virtual void translateOm1(); |
| 30 virtual void translateO2(); |
30 | 31 |
31 virtual Variable *getPhysicalRegister(SizeT RegNum); | 32 virtual Variable *getPhysicalRegister(SizeT RegNum); |
32 virtual IceString getRegName(SizeT RegNum, Type Ty) const; | 33 virtual IceString getRegName(SizeT RegNum, Type Ty) const; |
33 virtual llvm::SmallBitVector getRegisterSet(RegSetMask Include, | 34 virtual llvm::SmallBitVector getRegisterSet(RegSetMask Include, |
34 RegSetMask Exclude) const; | 35 RegSetMask Exclude) const; |
35 virtual const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const { | 36 virtual const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const { |
36 return TypeToRegisterSet[Ty]; | 37 return TypeToRegisterSet[Ty]; |
37 } | 38 } |
38 virtual bool hasFramePointer() const { return IsEbpBasedFrame; } | 39 virtual bool hasFramePointer() const { return IsEbpBasedFrame; } |
39 virtual SizeT getFrameOrStackReg() const { | 40 virtual SizeT getFrameOrStackReg() const { |
40 return IsEbpBasedFrame ? Reg_ebp : Reg_esp; | 41 return IsEbpBasedFrame ? Reg_ebp : Reg_esp; |
41 } | 42 } |
42 virtual size_t typeWidthInBytesOnStack(Type Ty) { | 43 virtual size_t typeWidthInBytesOnStack(Type Ty) { |
43 // Round up to the next multiple of 4 bytes. In particular, i1, | 44 // Round up to the next multiple of 4 bytes. In particular, i1, |
44 // i8, and i16 are rounded up to 4 bytes. | 45 // i8, and i16 are rounded up to 4 bytes. |
45 return (typeWidthInBytes(Ty) + 3) & ~3; | 46 return (typeWidthInBytes(Ty) + 3) & ~3; |
46 } | 47 } |
47 virtual void emitVariable(const Variable *Var, const Cfg *Func) const; | 48 virtual void emitVariable(const Variable *Var, const Cfg *Func) const; |
48 virtual void addProlog(CfgNode *Node); | 49 virtual void addProlog(CfgNode *Node); |
49 virtual void addEpilog(CfgNode *Node); | 50 virtual void addEpilog(CfgNode *Node); |
50 virtual void emitConstants() const; | 51 virtual void emitConstants() const; |
51 SizeT makeNextLabelNumber() { return NextLabelNumber++; } | 52 SizeT makeNextLabelNumber() { return NextLabelNumber++; } |
52 // Ensure that a 64-bit Variable has been split into 2 32-bit | 53 // Ensure that a 64-bit Variable has been split into 2 32-bit |
53 // Variables, creating them if necessary. This is needed for all | 54 // Variables, creating them if necessary. This is needed for all |
54 // I64 operations, and it is needed for pushing F64 arguments for | 55 // I64 operations, and it is needed for pushing F64 arguments for |
55 // function calls using the 32-bit push instruction (though the | 56 // function calls using the 32-bit push instruction (though the |
56 // latter could be done by directly writing to the stack). | 57 // latter could be done by directly writing to the stack). |
57 void split64(Variable *Var); | 58 void split64(Variable *Var); |
58 void setArgOffsetAndCopy(Variable *Arg, Variable *FramePtr, | 59 void setArgOffsetAndCopy(Variable *Arg, Variable *FramePtr, |
59 int32_t BasicFrameOffset, int32_t &InArgsSizeBytes); | 60 size_t BasicFrameOffset, size_t &InArgsSizeBytes); |
60 Operand *loOperand(Operand *Operand); | 61 Operand *loOperand(Operand *Operand); |
61 Operand *hiOperand(Operand *Operand); | 62 Operand *hiOperand(Operand *Operand); |
62 | 63 |
63 enum Registers { | 64 enum Registers { |
64 #define X(val, init, name, name16, name8, scratch, preserved, stackptr, \ | 65 #define X(val, init, name, name16, name8, scratch, preserved, stackptr, \ |
65 frameptr, isI8, isInt, isFP) \ | 66 frameptr, isI8, isInt, isFP) \ |
66 val init, | 67 val init, |
67 REGX8632_TABLE | 68 REGX8632_TABLE |
68 #undef X | 69 #undef X |
69 Reg_NUM | 70 Reg_NUM |
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82 virtual void lowerCast(const InstCast *Inst); | 83 virtual void lowerCast(const InstCast *Inst); |
83 virtual void lowerFcmp(const InstFcmp *Inst); | 84 virtual void lowerFcmp(const InstFcmp *Inst); |
84 virtual void lowerIcmp(const InstIcmp *Inst); | 85 virtual void lowerIcmp(const InstIcmp *Inst); |
85 virtual void lowerLoad(const InstLoad *Inst); | 86 virtual void lowerLoad(const InstLoad *Inst); |
86 virtual void lowerPhi(const InstPhi *Inst); | 87 virtual void lowerPhi(const InstPhi *Inst); |
87 virtual void lowerRet(const InstRet *Inst); | 88 virtual void lowerRet(const InstRet *Inst); |
88 virtual void lowerSelect(const InstSelect *Inst); | 89 virtual void lowerSelect(const InstSelect *Inst); |
89 virtual void lowerStore(const InstStore *Inst); | 90 virtual void lowerStore(const InstStore *Inst); |
90 virtual void lowerSwitch(const InstSwitch *Inst); | 91 virtual void lowerSwitch(const InstSwitch *Inst); |
91 virtual void lowerUnreachable(const InstUnreachable *Inst); | 92 virtual void lowerUnreachable(const InstUnreachable *Inst); |
| 93 virtual void doAddressOptLoad(); |
| 94 virtual void doAddressOptStore(); |
92 | 95 |
93 // Operand legalization helpers. To deal with address mode | 96 // Operand legalization helpers. To deal with address mode |
94 // constraints, the helpers will create a new Operand and emit | 97 // constraints, the helpers will create a new Operand and emit |
95 // instructions that guarantee that the Operand kind is one of those | 98 // instructions that guarantee that the Operand kind is one of those |
96 // indicated by the LegalMask (a bitmask of allowed kinds). If the | 99 // indicated by the LegalMask (a bitmask of allowed kinds). If the |
97 // input Operand is known to already meet the constraints, it may be | 100 // input Operand is known to already meet the constraints, it may be |
98 // simply returned as the result, without creating any new | 101 // simply returned as the result, without creating any new |
99 // instructions or operands. | 102 // instructions or operands. |
100 enum OperandLegalization { | 103 enum OperandLegalization { |
101 Legal_None = 0, | 104 Legal_None = 0, |
(...skipping 139 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
241 Context.insert(InstX8632Test::create(Func, Src0, Src1)); | 244 Context.insert(InstX8632Test::create(Func, Src0, Src1)); |
242 } | 245 } |
243 void _ucomiss(Operand *Src0, Operand *Src1) { | 246 void _ucomiss(Operand *Src0, Operand *Src1) { |
244 Context.insert(InstX8632Ucomiss::create(Func, Src0, Src1)); | 247 Context.insert(InstX8632Ucomiss::create(Func, Src0, Src1)); |
245 } | 248 } |
246 void _xor(Variable *Dest, Operand *Src0) { | 249 void _xor(Variable *Dest, Operand *Src0) { |
247 Context.insert(InstX8632Xor::create(Func, Dest, Src0)); | 250 Context.insert(InstX8632Xor::create(Func, Dest, Src0)); |
248 } | 251 } |
249 | 252 |
250 bool IsEbpBasedFrame; | 253 bool IsEbpBasedFrame; |
251 int32_t FrameSizeLocals; | 254 size_t FrameSizeLocals; |
252 int32_t LocalsSizeBytes; | 255 size_t LocalsSizeBytes; |
253 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM]; | 256 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM]; |
254 llvm::SmallBitVector ScratchRegs; | 257 llvm::SmallBitVector ScratchRegs; |
255 llvm::SmallBitVector RegsUsed; | 258 llvm::SmallBitVector RegsUsed; |
256 SizeT NextLabelNumber; | 259 SizeT NextLabelNumber; |
257 bool ComputedLiveRanges; | 260 bool ComputedLiveRanges; |
258 VarList PhysicalRegisters; | 261 VarList PhysicalRegisters; |
259 static IceString RegNames[]; | 262 static IceString RegNames[]; |
260 | 263 |
261 private: | 264 private: |
262 TargetX8632(const TargetX8632 &) LLVM_DELETED_FUNCTION; | 265 TargetX8632(const TargetX8632 &) LLVM_DELETED_FUNCTION; |
263 TargetX8632 &operator=(const TargetX8632 &) LLVM_DELETED_FUNCTION; | 266 TargetX8632 &operator=(const TargetX8632 &) LLVM_DELETED_FUNCTION; |
264 virtual ~TargetX8632() {} | 267 virtual ~TargetX8632() {} |
265 template <typename T> void emitConstantPool() const; | 268 template <typename T> void emitConstantPool() const; |
266 }; | 269 }; |
267 | 270 |
268 template <> void ConstantFloat::emit(const Cfg *Func) const; | 271 template <> void ConstantFloat::emit(GlobalContext *Ctx) const; |
269 template <> void ConstantDouble::emit(const Cfg *Func) const; | 272 template <> void ConstantDouble::emit(GlobalContext *Ctx) const; |
270 | 273 |
271 } // end of namespace Ice | 274 } // end of namespace Ice |
272 | 275 |
273 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632_H | 276 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632_H |
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