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1 //===- subzero/src/IceTargetLowering.cpp - Basic lowering implementation --===// | 1 //===- subzero/src/IceTargetLowering.cpp - Basic lowering implementation --===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // This file implements the skeleton of the TargetLowering class, | 10 // This file implements the skeleton of the TargetLowering class, |
11 // specifically invoking the appropriate lowering method for a given | 11 // specifically invoking the appropriate lowering method for a given |
12 // instruction kind and driving global register allocation. It also | 12 // instruction kind and driving global register allocation. It also |
13 // implements the non-deleted instruction iteration in | 13 // implements the non-deleted instruction iteration in |
14 // LoweringContext. | 14 // LoweringContext. |
15 // | 15 // |
16 //===----------------------------------------------------------------------===// | 16 //===----------------------------------------------------------------------===// |
17 | 17 |
18 #include "IceCfg.h" // setError() | 18 #include "IceCfg.h" // setError() |
19 #include "IceCfgNode.h" | 19 #include "IceCfgNode.h" |
20 #include "IceOperand.h" | 20 #include "IceOperand.h" |
| 21 #include "IceRegAlloc.h" |
21 #include "IceTargetLowering.h" | 22 #include "IceTargetLowering.h" |
22 #include "IceTargetLoweringX8632.h" | 23 #include "IceTargetLoweringX8632.h" |
23 | 24 |
24 namespace Ice { | 25 namespace Ice { |
25 | 26 |
26 void LoweringContext::init(CfgNode *N) { | 27 void LoweringContext::init(CfgNode *N) { |
27 Node = N; | 28 Node = N; |
28 Cur = getNode()->getInsts().begin(); | 29 Cur = getNode()->getInsts().begin(); |
29 End = getNode()->getInsts().end(); | 30 End = getNode()->getInsts().end(); |
30 skipDeleted(Cur); | 31 skipDeleted(Cur); |
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59 return IceTargetX8664::create(Func); | 60 return IceTargetX8664::create(Func); |
60 if (Target == Target_ARM32) | 61 if (Target == Target_ARM32) |
61 return IceTargetARM32::create(Func); | 62 return IceTargetARM32::create(Func); |
62 if (Target == Target_ARM64) | 63 if (Target == Target_ARM64) |
63 return IceTargetARM64::create(Func); | 64 return IceTargetARM64::create(Func); |
64 #endif | 65 #endif |
65 Func->setError("Unsupported target"); | 66 Func->setError("Unsupported target"); |
66 return NULL; | 67 return NULL; |
67 } | 68 } |
68 | 69 |
| 70 void TargetLowering::doAddressOpt() { |
| 71 if (llvm::isa<InstLoad>(*Context.getCur())) |
| 72 doAddressOptLoad(); |
| 73 else if (llvm::isa<InstStore>(*Context.getCur())) |
| 74 doAddressOptStore(); |
| 75 Context.advanceCur(); |
| 76 Context.advanceNext(); |
| 77 } |
| 78 |
69 // Lowers a single instruction according to the information in | 79 // Lowers a single instruction according to the information in |
70 // Context, by checking the Context.Cur instruction kind and calling | 80 // Context, by checking the Context.Cur instruction kind and calling |
71 // the appropriate lowering method. The lowering method should insert | 81 // the appropriate lowering method. The lowering method should insert |
72 // target instructions at the Cur.Next insertion point, and should not | 82 // target instructions at the Cur.Next insertion point, and should not |
73 // delete the Context.Cur instruction or advance Context.Cur. | 83 // delete the Context.Cur instruction or advance Context.Cur. |
74 // | 84 // |
75 // The lowering method may look ahead in the instruction stream as | 85 // The lowering method may look ahead in the instruction stream as |
76 // desired, and lower additional instructions in conjunction with the | 86 // desired, and lower additional instructions in conjunction with the |
77 // current one, for example fusing a compare and branch. If it does, | 87 // current one, for example fusing a compare and branch. If it does, |
78 // it should advance Context.Cur to point to the next non-deleted | 88 // it should advance Context.Cur to point to the next non-deleted |
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137 break; | 147 break; |
138 } | 148 } |
139 Inst->setDeleted(); | 149 Inst->setDeleted(); |
140 | 150 |
141 postLower(); | 151 postLower(); |
142 | 152 |
143 Context.advanceCur(); | 153 Context.advanceCur(); |
144 Context.advanceNext(); | 154 Context.advanceNext(); |
145 } | 155 } |
146 | 156 |
| 157 // Drives register allocation, allowing all physical registers (except |
| 158 // perhaps for the frame pointer) to be allocated. This set of |
| 159 // registers could potentially be parameterized if we want to restrict |
| 160 // registers e.g. for performance testing. |
| 161 void TargetLowering::regAlloc() { |
| 162 LinearScan LinearScan(Func); |
| 163 RegSetMask RegInclude = RegSet_None; |
| 164 RegSetMask RegExclude = RegSet_None; |
| 165 RegInclude |= RegSet_CallerSave; |
| 166 RegInclude |= RegSet_CalleeSave; |
| 167 RegExclude |= RegSet_StackPointer; |
| 168 if (hasFramePointer()) |
| 169 RegExclude |= RegSet_FramePointer; |
| 170 llvm::SmallBitVector RegMask = getRegisterSet(RegInclude, RegExclude); |
| 171 LinearScan.scan(RegMask); |
| 172 } |
| 173 |
147 } // end of namespace Ice | 174 } // end of namespace Ice |
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