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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #ifndef VM_ASSEMBLER_ARM_H_ | 5 #ifndef VM_ASSEMBLER_ARM_H_ |
| 6 #define VM_ASSEMBLER_ARM_H_ | 6 #define VM_ASSEMBLER_ARM_H_ |
| 7 | 7 |
| 8 #ifndef VM_ASSEMBLER_H_ | 8 #ifndef VM_ASSEMBLER_H_ |
| 9 #error Do not include assembler_arm.h directly; use assembler.h instead. | 9 #error Do not include assembler_arm.h directly; use assembler.h instead. |
| 10 #endif | 10 #endif |
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| 161 enum OperandSize { | 161 enum OperandSize { |
| 162 kByte, | 162 kByte, |
| 163 kUnsignedByte, | 163 kUnsignedByte, |
| 164 kHalfword, | 164 kHalfword, |
| 165 kUnsignedHalfword, | 165 kUnsignedHalfword, |
| 166 kWord, | 166 kWord, |
| 167 kUnsignedWord, | 167 kUnsignedWord, |
| 168 kWordPair, | 168 kWordPair, |
| 169 kSWord, | 169 kSWord, |
| 170 kDWord, | 170 kDWord, |
| 171 kRegList, |
| 171 }; | 172 }; |
| 172 | 173 |
| 173 | 174 |
| 174 // Load/store multiple addressing mode. | 175 // Load/store multiple addressing mode. |
| 175 enum BlockAddressMode { | 176 enum BlockAddressMode { |
| 176 // bit encoding P U W | 177 // bit encoding P U W |
| 177 DA = (0|0|0) << 21, // decrement after | 178 DA = (0|0|0) << 21, // decrement after |
| 178 IA = (0|4|0) << 21, // increment after | 179 IA = (0|4|0) << 21, // increment after |
| 179 DB = (8|0|0) << 21, // decrement before | 180 DB = (8|0|0) << 21, // decrement before |
| 180 IB = (8|4|0) << 21, // increment before | 181 IB = (8|4|0) << 21, // increment before |
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| 207 Address(const Address& other) | 208 Address(const Address& other) |
| 208 : ValueObject(), encoding_(other.encoding_), kind_(other.kind_) { | 209 : ValueObject(), encoding_(other.encoding_), kind_(other.kind_) { |
| 209 } | 210 } |
| 210 | 211 |
| 211 Address& operator=(const Address& other) { | 212 Address& operator=(const Address& other) { |
| 212 encoding_ = other.encoding_; | 213 encoding_ = other.encoding_; |
| 213 kind_ = other.kind_; | 214 kind_ = other.kind_; |
| 214 return *this; | 215 return *this; |
| 215 } | 216 } |
| 216 | 217 |
| 218 bool Equals(const Address& other) const { |
| 219 return (encoding_ == other.encoding_) && (kind_ == other.kind_); |
| 220 } |
| 221 |
| 217 explicit Address(Register rn, int32_t offset = 0, Mode am = Offset) { | 222 explicit Address(Register rn, int32_t offset = 0, Mode am = Offset) { |
| 218 ASSERT(Utils::IsAbsoluteUint(12, offset)); | 223 ASSERT(Utils::IsAbsoluteUint(12, offset)); |
| 219 kind_ = Immediate; | 224 kind_ = Immediate; |
| 220 if (offset < 0) { | 225 if (offset < 0) { |
| 221 encoding_ = (am ^ (1 << kUShift)) | -offset; // Flip U to adjust sign. | 226 encoding_ = (am ^ (1 << kUShift)) | -offset; // Flip U to adjust sign. |
| 222 } else { | 227 } else { |
| 223 encoding_ = am | offset; | 228 encoding_ = am | offset; |
| 224 } | 229 } |
| 225 encoding_ |= static_cast<uint32_t>(rn) << kRnShift; | 230 encoding_ |= static_cast<uint32_t>(rn) << kRnShift; |
| 226 } | 231 } |
| 227 | 232 |
| 228 Address(Register rn, Register rm, | 233 Address(Register rn, Register rm, |
| 229 Shift shift = LSL, uint32_t shift_imm = 0, Mode am = Offset) { | 234 Shift shift = LSL, uint32_t shift_imm = 0, Mode am = Offset) { |
| 230 ShifterOperand so(rm, shift, shift_imm); | 235 ShifterOperand so(rm, shift, shift_imm); |
| 231 | 236 |
| 232 if ((shift == LSL) && (shift_imm == 0)) { | 237 if ((shift == LSL) && (shift_imm == 0)) { |
| 233 kind_ = IndexRegister; | 238 kind_ = IndexRegister; |
| 234 } else { | 239 } else { |
| 235 kind_ = ScaledIndexRegister; | 240 kind_ = ScaledIndexRegister; |
| 236 } | 241 } |
| 237 encoding_ = so.encoding() | am | (static_cast<uint32_t>(rn) << kRnShift); | 242 encoding_ = so.encoding() | am | (static_cast<uint32_t>(rn) << kRnShift); |
| 238 } | 243 } |
| 239 | 244 |
| 240 static bool CanHoldLoadOffset(OperandSize type, | 245 static OperandSize OperandSizeFor(intptr_t cid); |
| 246 |
| 247 static bool CanHoldLoadOffset(OperandSize size, |
| 241 int32_t offset, | 248 int32_t offset, |
| 242 int32_t* offset_mask); | 249 int32_t* offset_mask); |
| 243 static bool CanHoldStoreOffset(OperandSize type, | 250 static bool CanHoldStoreOffset(OperandSize size, |
| 244 int32_t offset, | 251 int32_t offset, |
| 245 int32_t* offset_mask); | 252 int32_t* offset_mask); |
| 246 | 253 |
| 247 private: | 254 private: |
| 248 uint32_t encoding() const { return encoding_; } | 255 uint32_t encoding() const { return encoding_; } |
| 249 | 256 |
| 250 // Encoding for addressing mode 3. | 257 // Encoding for addressing mode 3. |
| 251 uint32_t encoding3() const; | 258 uint32_t encoding3() const; |
| 252 | 259 |
| 253 // Encoding for vfp load/store addressing. | 260 // Encoding for vfp load/store addressing. |
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| 914 Register value, | 921 Register value, |
| 915 Label* no_update); | 922 Label* no_update); |
| 916 | 923 |
| 917 DISALLOW_ALLOCATION(); | 924 DISALLOW_ALLOCATION(); |
| 918 DISALLOW_COPY_AND_ASSIGN(Assembler); | 925 DISALLOW_COPY_AND_ASSIGN(Assembler); |
| 919 }; | 926 }; |
| 920 | 927 |
| 921 } // namespace dart | 928 } // namespace dart |
| 922 | 929 |
| 923 #endif // VM_ASSEMBLER_ARM_H_ | 930 #endif // VM_ASSEMBLER_ARM_H_ |
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