Generate better ARM code for indexed loads and stores.

runtime/vm/assembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/longjump.h"
@@ skipping 2015 matching lines @@
   const ARMVersion version = TargetCPUFeatures::arm_version();
   if ((version == ARMv5TE) || (version == ARMv6)) {
     BindARMv6(label);
   } else {
     ASSERT(version == ARMv7);
     BindARMv7(label);
   }
 }
 
 
-bool Address::CanHoldLoadOffset(OperandSize type,
+OperandSize Address::OperandSizeFor(intptr_t cid) {
+  switch (cid) {
+    case kArrayCid:
+    case kImmutableArrayCid:
+      return kWord;
+    case kOneByteStringCid:
+      return kByte;
+    case kTwoByteStringCid:
+      return kHalfword;
+    case kTypedDataInt8ArrayCid:
+      return kByte;
+    case kTypedDataUint8ArrayCid:
+    case kTypedDataUint8ClampedArrayCid:
+    case kExternalTypedDataUint8ArrayCid:
+    case kExternalTypedDataUint8ClampedArrayCid:
+      return kUnsignedByte;
+    case kTypedDataInt16ArrayCid:
+      return kHalfword;
+    case kTypedDataUint16ArrayCid:
+      return kUnsignedHalfword;
+    case kTypedDataInt32ArrayCid:
+      return kWord;
+    case kTypedDataUint32ArrayCid:
+      return kUnsignedWord;
+    case kTypedDataInt64ArrayCid:
+    case kTypedDataUint64ArrayCid:
+      UNREACHABLE(); return kByte;
+    case kTypedDataFloat32ArrayCid:
+      return kSWord;
+    case kTypedDataFloat64ArrayCid:
+      return kDWord;
+    case kTypedDataFloat32x4ArrayCid:
+    case kTypedDataInt32x4ArrayCid:
+    case kTypedDataFloat64x2ArrayCid:
+      return kRegList;
+    case kTypedDataInt8ArrayViewCid:
+      UNREACHABLE(); return kByte;

[zra, 2014/05/23 20:03:24]

newline?

[regis, 2014/05/23 20:21:35]

Done.

+    default:
+      UNREACHABLE(); return kByte;

[zra, 2014/05/23 20:03:24]

newline?

[regis, 2014/05/23 20:21:35]

Done.

+  }
+}
+
+
+bool Address::CanHoldLoadOffset(OperandSize size,
                                 int32_t offset,
                                 int32_t* offset_mask) {
-  switch (type) {
+  switch (size) {
     case kByte:
     case kHalfword:
     case kUnsignedHalfword:
     case kWordPair: {
       *offset_mask = 0xff;
       return Utils::IsAbsoluteUint(8, offset);  // Addressing mode 3.
     }
     case kUnsignedByte:
-    case kWord: {
+    case kWord:
+    case kUnsignedWord: {
       *offset_mask = 0xfff;
       return Utils::IsAbsoluteUint(12, offset);  // Addressing mode 2.
     }
     case kSWord:
     case kDWord: {
       *offset_mask = 0x3fc;  // Multiple of 4.
       // VFP addressing mode.
       return (Utils::IsAbsoluteUint(10, offset) && Utils::IsAligned(offset, 4));
     }
+    case kRegList: {
+      *offset_mask = 0x0;
+      return offset == 0;
+    }
     default: {
       UNREACHABLE();
       return false;
     }
   }
 }
 
 
-bool Address::CanHoldStoreOffset(OperandSize type,
+bool Address::CanHoldStoreOffset(OperandSize size,
                                  int32_t offset,
                                  int32_t* offset_mask) {
-  switch (type) {
+  switch (size) {
     case kHalfword:
+    case kUnsignedHalfword:
     case kWordPair: {
       *offset_mask = 0xff;
       return Utils::IsAbsoluteUint(8, offset);  // Addressing mode 3.
     }
     case kByte:
-    case kWord: {
+    case kUnsignedByte:
+    case kWord:
+    case kUnsignedWord: {
       *offset_mask = 0xfff;
       return Utils::IsAbsoluteUint(12, offset);  // Addressing mode 2.
     }
     case kSWord:
     case kDWord: {
       *offset_mask = 0x3fc;  // Multiple of 4.
       // VFP addressing mode.
       return (Utils::IsAbsoluteUint(10, offset) && Utils::IsAligned(offset, 4));
     }
+    case kRegList: {
+      *offset_mask = 0x0;
+      return offset == 0;
+    }
     default: {
       UNREACHABLE();
       return false;
     }
   }
 }
 
 
 void Assembler::Push(Register rd, Condition cond) {
   str(rd, Address(SP, -kWordSize, Address::PreIndex), cond);
@@ skipping 251 matching lines @@
     // A scratch register and IP are needed to load an arbitrary double.
     ASSERT(scratch != kNoRegister);
     int64_t imm64 = bit_cast<int64_t, double>(value);
     LoadImmediate(IP, Utils::Low32Bits(imm64), cond);
     LoadImmediate(scratch, Utils::High32Bits(imm64), cond);
     vmovdrr(dd, IP, scratch, cond);
   }
 }
 
 
-void Assembler::LoadFromOffset(OperandSize type,
+void Assembler::LoadFromOffset(OperandSize size,
                                Register reg,
                                Register base,
                                int32_t offset,
                                Condition cond) {
   int32_t offset_mask = 0;
-  if (!Address::CanHoldLoadOffset(type, offset, &offset_mask)) {
+  if (!Address::CanHoldLoadOffset(size, offset, &offset_mask)) {
     ASSERT(base != IP);
     AddImmediate(IP, base, offset & ~offset_mask, cond);
     base = IP;
     offset = offset & offset_mask;
   }
-  switch (type) {
+  switch (size) {
     case kByte:
       ldrsb(reg, Address(base, offset), cond);
       break;
     case kUnsignedByte:
       ldrb(reg, Address(base, offset), cond);
       break;
     case kHalfword:
       ldrsh(reg, Address(base, offset), cond);
       break;
     case kUnsignedHalfword:
       ldrh(reg, Address(base, offset), cond);
       break;
     case kWord:
       ldr(reg, Address(base, offset), cond);
       break;
     case kWordPair:
       ldrd(reg, Address(base, offset), cond);
       break;
     default:
       UNREACHABLE();
   }
 }
 
 
-void Assembler::StoreToOffset(OperandSize type,
+void Assembler::StoreToOffset(OperandSize size,
                               Register reg,
                               Register base,
                               int32_t offset,
                               Condition cond) {
   int32_t offset_mask = 0;
-  if (!Address::CanHoldStoreOffset(type, offset, &offset_mask)) {
+  if (!Address::CanHoldStoreOffset(size, offset, &offset_mask)) {
     ASSERT(reg != IP);
     ASSERT(base != IP);
     AddImmediate(IP, base, offset & ~offset_mask, cond);
     base = IP;
     offset = offset & offset_mask;
   }
-  switch (type) {
+  switch (size) {
     case kByte:
       strb(reg, Address(base, offset), cond);
       break;
     case kHalfword:
       strh(reg, Address(base, offset), cond);
       break;
     case kWord:
       str(reg, Address(base, offset), cond);
       break;
     case kWordPair:
@@ skipping 734 matching lines @@
 
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
   return fpu_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM