Revert "[vm] Implement more efficient CAS in simarm/simarm64 modes"

runtime/vm/simulator_arm64.h

Index: runtime/vm/simulator_arm64.h
diff --git a/runtime/vm/simulator_arm64.h b/runtime/vm/simulator_arm64.h
index 78059ea176ae5f7b450e033a9bb4574d94129732..a1a36699e393b688ee2820b8ee9b4055a3f8ffa9 100644
--- a/runtime/vm/simulator_arm64.h
+++ b/runtime/vm/simulator_arm64.h
@@ -101,6 +101,15 @@ class Simulator {
                bool fp_return = false,
                bool fp_args = false);
 
+  // Implementation of atomic compare and exchange in the same synchronization
+  // domain as other synchronization primitive instructions (e.g. ldrex, strex).
+  static uword CompareExchange(uword* address,
+                               uword compare_value,
+                               uword new_value);
+  static uint32_t CompareExchangeUint32(uint32_t* address,
+                                        uint32_t compare_value,
+                                        uint32_t new_value);
+
   // Runtime and native call support.
   enum CallKind {
     kRuntimeCall,
@@ -178,6 +187,22 @@ class Simulator {
   inline intptr_t ReadX(uword addr, Instr* instr);
   inline void WriteX(uword addr, intptr_t value, Instr* instr);
 
+  // We keep track of 16 exclusive access address tags across all threads.
+  // Since we cannot simulate a native context switch, which clears
+  // the exclusive access state of the local monitor (using the CLREX
+  // instruction), we associate the thread requesting exclusive access to the
+  // address tag. Multiple threads requesting exclusive access (using the LDREX
+  // instruction) to the same address will result in multiple address tags being
+  // created for the same address, one per thread.
+  // At any given time, each thread is associated to at most one address tag.
+  static Mutex* exclusive_access_lock_;
+  static const int kNumAddressTags = 16;
+  static struct AddressTag {
+    Thread* thread;
+    uword addr;
+  } exclusive_access_state_[kNumAddressTags];
+  static int next_address_tag_;
+
   // Synchronization primitives support.
   void ClearExclusive();
   intptr_t ReadExclusiveX(uword addr, Instr* instr);
@@ -186,13 +211,15 @@ class Simulator {
   intptr_t ReadExclusiveW(uword addr, Instr* instr);
   intptr_t WriteExclusiveW(uword addr, intptr_t value, Instr* instr);
 
-  // Exclusive access reservation: address and value observed during
-  // load-exclusive. Store-exclusive verifies that address is the same and
-  // performs atomic compare-and-swap with remembered value to observe value
-  // changes. This implementation of ldxr/stxr instructions does not detect
-  // ABA situation and our uses of ldxr/stxr don't need this detection.
-  uword exclusive_access_addr_;
-  uword exclusive_access_value_;
+  // Set access to given address to 'exclusive state' for current thread.
+  static void SetExclusiveAccess(uword addr);
+
+  // Returns true if the current thread has exclusive access to given address,
+  // returns false otherwise. In either case, set access to given address to
+  // 'open state' for all threads.
+  // If given addr is NULL, set access to 'open state' for current
+  // thread (CLREX).
+  static bool HasExclusiveAccessAndOpen(uword addr);
 
   // Helper functions to set the conditional flags in the architecture state.
   void SetNZFlagsW(int32_t val);