Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(423)

Side by Side Diff: runtime/vm/simulator_arm.h

Issue 3000803003: Revert "[vm] Implement more efficient CAS in simarm/simarm64 modes" (Closed)
Patch Set: Created 3 years, 4 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « runtime/vm/atomic_simulator.h ('k') | runtime/vm/simulator_arm.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 // Declares a Simulator for ARM instructions if we are not generating a native 5 // Declares a Simulator for ARM instructions if we are not generating a native
6 // ARM binary. This Simulator allows us to run and debug ARM code generation on 6 // ARM binary. This Simulator allows us to run and debug ARM code generation on
7 // regular desktop machines. 7 // regular desktop machines.
8 // Dart calls into generated code by "calling" the InvokeDartCode stub, 8 // Dart calls into generated code by "calling" the InvokeDartCode stub,
9 // which will start execution in the Simulator or forwards to the real entry 9 // which will start execution in the Simulator or forwards to the real entry
10 // on a ARM HW platform. 10 // on a ARM HW platform.
(...skipping 86 matching lines...) Expand 10 before | Expand all | Expand 10 after
97 // If fp_args is true, the parameters0-3 are placed in S0-3. Otherwise, they 97 // If fp_args is true, the parameters0-3 are placed in S0-3. Otherwise, they
98 // are placed in R0-3. 98 // are placed in R0-3.
99 int64_t Call(int32_t entry, 99 int64_t Call(int32_t entry,
100 int32_t parameter0, 100 int32_t parameter0,
101 int32_t parameter1, 101 int32_t parameter1,
102 int32_t parameter2, 102 int32_t parameter2,
103 int32_t parameter3, 103 int32_t parameter3,
104 bool fp_return = false, 104 bool fp_return = false,
105 bool fp_args = false); 105 bool fp_args = false);
106 106
107 // Implementation of atomic compare and exchange in the same synchronization
108 // domain as other synchronization primitive instructions (e.g. ldrex, strex).
109 static uword CompareExchange(uword* address,
110 uword compare_value,
111 uword new_value);
112 static uint32_t CompareExchangeUint32(uint32_t* address,
113 uint32_t compare_value,
114 uint32_t new_value);
115
107 // Runtime and native call support. 116 // Runtime and native call support.
108 enum CallKind { 117 enum CallKind {
109 kRuntimeCall, 118 kRuntimeCall,
110 kLeafRuntimeCall, 119 kLeafRuntimeCall,
111 kLeafFloatRuntimeCall, 120 kLeafFloatRuntimeCall,
112 kBootstrapNativeCall, 121 kBootstrapNativeCall,
113 kNativeCall 122 kNativeCall
114 }; 123 };
115 static uword RedirectExternalReference(uword function, 124 static uword RedirectExternalReference(uword function,
116 CallKind call_kind, 125 CallKind call_kind,
(...skipping 85 matching lines...) Expand 10 before | Expand all | Expand 10 after
202 inline void WriteH(uword addr, uint16_t value, Instr* instr); 211 inline void WriteH(uword addr, uint16_t value, Instr* instr);
203 212
204 inline intptr_t ReadW(uword addr, Instr* instr); 213 inline intptr_t ReadW(uword addr, Instr* instr);
205 inline void WriteW(uword addr, intptr_t value, Instr* instr); 214 inline void WriteW(uword addr, intptr_t value, Instr* instr);
206 215
207 // Synchronization primitives support. 216 // Synchronization primitives support.
208 void ClearExclusive(); 217 void ClearExclusive();
209 intptr_t ReadExclusiveW(uword addr, Instr* instr); 218 intptr_t ReadExclusiveW(uword addr, Instr* instr);
210 intptr_t WriteExclusiveW(uword addr, intptr_t value, Instr* instr); 219 intptr_t WriteExclusiveW(uword addr, intptr_t value, Instr* instr);
211 220
212 // Exclusive access reservation: address and value observed during 221 // We keep track of 16 exclusive access address tags across all threads.
213 // load-exclusive. Store-exclusive verifies that address is the same and 222 // Since we cannot simulate a native context switch, which clears
214 // performs atomic compare-and-swap with remembered value to observe value 223 // the exclusive access state of the local monitor (using the CLREX
215 // changes. This implementation of ldrex/strex instructions does not detect 224 // instruction), we associate the thread requesting exclusive access to the
216 // ABA situation and our uses of ldrex/strex don't need this detection. 225 // address tag. Multiple threads requesting exclusive access (using the LDREX
217 uword exclusive_access_addr_; 226 // instruction) to the same address will result in multiple address tags being
218 uword exclusive_access_value_; 227 // created for the same address, one per thread.
228 // At any given time, each thread is associated to at most one address tag.
229 static Mutex* exclusive_access_lock_;
230 static const int kNumAddressTags = 16;
231 static struct AddressTag {
232 Thread* thread;
233 uword addr;
234 } exclusive_access_state_[kNumAddressTags];
235 static int next_address_tag_;
236
237 // Set access to given address to 'exclusive state' for current thread.
238 static void SetExclusiveAccess(uword addr);
239
240 // Returns true if the current thread has exclusive access to given address,
241 // returns false otherwise. In either case, set access to given address to
242 // 'open state' for all threads.
243 // If given addr is NULL, set access to 'open state' for current
244 // thread (CLREX).
245 static bool HasExclusiveAccessAndOpen(uword addr);
219 246
220 // Executing is handled based on the instruction type. 247 // Executing is handled based on the instruction type.
221 void DecodeType01(Instr* instr); // Both type 0 and type 1 rolled into one. 248 void DecodeType01(Instr* instr); // Both type 0 and type 1 rolled into one.
222 void DecodeType2(Instr* instr); 249 void DecodeType2(Instr* instr);
223 void DecodeType3(Instr* instr); 250 void DecodeType3(Instr* instr);
224 void DecodeType4(Instr* instr); 251 void DecodeType4(Instr* instr);
225 void DecodeType5(Instr* instr); 252 void DecodeType5(Instr* instr);
226 void DecodeType6(Instr* instr); 253 void DecodeType6(Instr* instr);
227 void DecodeType7(Instr* instr); 254 void DecodeType7(Instr* instr);
228 void DecodeSIMDDataProcessing(Instr* instr); 255 void DecodeSIMDDataProcessing(Instr* instr);
(...skipping 14 matching lines...) Expand all
243 } 270 }
244 271
245 friend class SimulatorDebugger; 272 friend class SimulatorDebugger;
246 friend class SimulatorSetjmpBuffer; 273 friend class SimulatorSetjmpBuffer;
247 DISALLOW_COPY_AND_ASSIGN(Simulator); 274 DISALLOW_COPY_AND_ASSIGN(Simulator);
248 }; 275 };
249 276
250 } // namespace dart 277 } // namespace dart
251 278
252 #endif // RUNTIME_VM_SIMULATOR_ARM_H_ 279 #endif // RUNTIME_VM_SIMULATOR_ARM_H_
OLDNEW
« no previous file with comments | « runtime/vm/atomic_simulator.h ('k') | runtime/vm/simulator_arm.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698