[vm] Implement more efficient CAS in simarm/simarm64 modes, v.2

runtime/vm/simulator_arm64.h

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 // Declares a Simulator for ARM64 instructions if we are not generating a native
 // ARM64 binary. This Simulator allows us to run and debug ARM64 code generation
 // on regular desktop machines.
 // Dart calls into generated code by "calling" the InvokeDartCode stub,
 // which will start execution in the Simulator or forwards to the real entry
 // on a ARM64 HW platform.
@@ skipping 83 matching lines @@
   // result on return. The return value is R0. The parameters are placed in
   // R0-3.
   int64_t Call(int64_t entry,
                int64_t parameter0,
                int64_t parameter1,
                int64_t parameter2,
                int64_t parameter3,
                bool fp_return = false,
                bool fp_args = false);
 
-  // Implementation of atomic compare and exchange in the same synchronization
-  // domain as other synchronization primitive instructions (e.g. ldrex, strex).
-  static uword CompareExchange(uword* address,
-                               uword compare_value,
-                               uword new_value);
-  static uint32_t CompareExchangeUint32(uint32_t* address,
-                                        uint32_t compare_value,
-                                        uint32_t new_value);
-
   // Runtime and native call support.
   enum CallKind {
     kRuntimeCall,
     kLeafRuntimeCall,
     kLeafFloatRuntimeCall,
     kBootstrapNativeCall,
     kNativeCall
   };
   static uword RedirectExternalReference(uword function,
                                          CallKind call_kind,
@@ skipping 57 matching lines @@
   inline int16_t ReadH(uword addr, Instr* instr);
   inline void WriteH(uword addr, uint16_t value, Instr* instr);
 
   inline uint32_t ReadWU(uword addr, Instr* instr);
   inline int32_t ReadW(uword addr, Instr* instr);
   inline void WriteW(uword addr, uint32_t value, Instr* instr);
 
   inline intptr_t ReadX(uword addr, Instr* instr);
   inline void WriteX(uword addr, intptr_t value, Instr* instr);
 
-  // We keep track of 16 exclusive access address tags across all threads.
-  // Since we cannot simulate a native context switch, which clears
-  // the exclusive access state of the local monitor (using the CLREX
-  // instruction), we associate the thread requesting exclusive access to the
-  // address tag. Multiple threads requesting exclusive access (using the LDREX
-  // instruction) to the same address will result in multiple address tags being
-  // created for the same address, one per thread.
-  // At any given time, each thread is associated to at most one address tag.
-  static Mutex* exclusive_access_lock_;
-  static const int kNumAddressTags = 16;
-  static struct AddressTag {
-    Thread* thread;
-    uword addr;
-  } exclusive_access_state_[kNumAddressTags];
-  static int next_address_tag_;
-
   // Synchronization primitives support.
   void ClearExclusive();
   intptr_t ReadExclusiveX(uword addr, Instr* instr);
   intptr_t WriteExclusiveX(uword addr, intptr_t value, Instr* instr);
   // 32 bit versions.
   intptr_t ReadExclusiveW(uword addr, Instr* instr);
   intptr_t WriteExclusiveW(uword addr, intptr_t value, Instr* instr);
 
-  // Set access to given address to 'exclusive state' for current thread.
-  static void SetExclusiveAccess(uword addr);
-
-  // Returns true if the current thread has exclusive access to given address,
-  // returns false otherwise. In either case, set access to given address to
-  // 'open state' for all threads.
-  // If given addr is NULL, set access to 'open state' for current
-  // thread (CLREX).
-  static bool HasExclusiveAccessAndOpen(uword addr);
+  // Exclusive access reservation: address and value observed during
+  // load-exclusive. Store-exclusive verifies that address is the same and
+  // performs atomic compare-and-swap with remembered value to observe value
+  // changes. This implementation of ldxr/stxr instructions does not detect
+  // ABA situation and our uses of ldxr/stxr don't need this detection.
+  uword exclusive_access_addr_;
+  uword exclusive_access_value_;
 
   // Helper functions to set the conditional flags in the architecture state.
   void SetNZFlagsW(int32_t val);
   bool CarryFromW(int32_t left, int32_t right, int32_t carry);
   bool OverflowFromW(int32_t left, int32_t right, int32_t carry);
 
   void SetNZFlagsX(int64_t val);
   bool CarryFromX(int64_t alu_out, int64_t left, int64_t right, bool addition);
   bool OverflowFromX(int64_t alu_out,
                      int64_t left,
@@ skipping 38 matching lines @@
   }
 
   friend class SimulatorDebugger;
   friend class SimulatorSetjmpBuffer;
   DISALLOW_COPY_AND_ASSIGN(Simulator);
 };
 
 }  // namespace dart
 
 #endif  // RUNTIME_VM_SIMULATOR_ARM64_H_