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| 1 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file | 
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a | 
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. | 
| 4 | 4 | 
| 5 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM. | 5 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM. | 
| 6 #if defined(TARGET_ARCH_ARM) | 6 #if defined(TARGET_ARCH_ARM) | 
| 7 | 7 | 
| 8 #include "vm/flow_graph_compiler.h" | 8 #include "vm/flow_graph_compiler.h" | 
| 9 | 9 | 
| 10 #include "vm/ast_printer.h" | 10 #include "vm/ast_printer.h" | 
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| 1440         // TOOD(regis): merge stores using vstmd instruction. | 1440         // TOOD(regis): merge stores using vstmd instruction. | 
| 1441         __ vstrd(d1, Address(SP, offset)); | 1441         __ vstrd(d1, Address(SP, offset)); | 
| 1442         __ vstrd(d2, Address(SP, offset + 2 * kWordSize)); | 1442         __ vstrd(d2, Address(SP, offset + 2 * kWordSize)); | 
| 1443         offset += kFpuRegisterSize; | 1443         offset += kFpuRegisterSize; | 
| 1444       } | 1444       } | 
| 1445     } | 1445     } | 
| 1446     ASSERT(offset == (fpu_regs_count * kFpuRegisterSize)); | 1446     ASSERT(offset == (fpu_regs_count * kFpuRegisterSize)); | 
| 1447   } | 1447   } | 
| 1448 | 1448 | 
| 1449   // Store general purpose registers with the highest register number at the | 1449   // Store general purpose registers with the highest register number at the | 
| 1450   // lowest address. | 1450   // lowest address. The order in which the registers are pushed must match the | 
|  | 1451   // order in which the registers are encoded in the safe point's stack map. | 
|  | 1452   // NOTE: Using ARM's multi-register push, pushes the registers in the wrong | 
|  | 1453   // order. | 
| 1451   for (intptr_t reg_idx = 0; reg_idx < kNumberOfCpuRegisters; ++reg_idx) { | 1454   for (intptr_t reg_idx = 0; reg_idx < kNumberOfCpuRegisters; ++reg_idx) { | 
| 1452     Register reg = static_cast<Register>(reg_idx); | 1455     Register reg = static_cast<Register>(reg_idx); | 
| 1453     if (locs->live_registers()->ContainsRegister(reg)) { | 1456     if (locs->live_registers()->ContainsRegister(reg)) { | 
| 1454       __ Push(reg); | 1457       __ Push(reg); | 
| 1455     } | 1458     } | 
| 1456   } | 1459   } | 
| 1457 } | 1460 } | 
| 1458 | 1461 | 
| 1459 | 1462 | 
| 1460 void FlowGraphCompiler::RestoreLiveRegisters(LocationSummary* locs) { | 1463 void FlowGraphCompiler::RestoreLiveRegisters(LocationSummary* locs) { | 
| 1461   // General purpose registers have the highest register number at the | 1464   // General purpose registers have the highest register number at the | 
| 1462   // lowest address. | 1465   // lowest address. The order in which the registers are popped must match the | 
|  | 1466   // order in which the registers are pushed in SaveLiveRegisters. | 
| 1463   for (intptr_t reg_idx = kNumberOfCpuRegisters - 1; reg_idx >= 0; --reg_idx) { | 1467   for (intptr_t reg_idx = kNumberOfCpuRegisters - 1; reg_idx >= 0; --reg_idx) { | 
| 1464     Register reg = static_cast<Register>(reg_idx); | 1468     Register reg = static_cast<Register>(reg_idx); | 
| 1465     if (locs->live_registers()->ContainsRegister(reg)) { | 1469     if (locs->live_registers()->ContainsRegister(reg)) { | 
| 1466       __ Pop(reg); | 1470       __ Pop(reg); | 
| 1467     } | 1471     } | 
| 1468   } | 1472   } | 
| 1469 | 1473 | 
| 1470   const intptr_t fpu_regs_count = locs->live_registers()->FpuRegisterCount(); | 1474   const intptr_t fpu_regs_count = locs->live_registers()->FpuRegisterCount(); | 
| 1471   if (fpu_regs_count > 0) { | 1475   if (fpu_regs_count > 0) { | 
| 1472     // Fpu registers have the lowest register number at the lowest address. | 1476     // Fpu registers have the lowest register number at the lowest address. | 
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| 1817   DRegister dreg = EvenDRegisterOf(reg); | 1821   DRegister dreg = EvenDRegisterOf(reg); | 
| 1818   __ vldrd(dreg, Address(SP, kDoubleSize, Address::PostIndex)); | 1822   __ vldrd(dreg, Address(SP, kDoubleSize, Address::PostIndex)); | 
| 1819 } | 1823 } | 
| 1820 | 1824 | 
| 1821 | 1825 | 
| 1822 #undef __ | 1826 #undef __ | 
| 1823 | 1827 | 
| 1824 }  // namespace dart | 1828 }  // namespace dart | 
| 1825 | 1829 | 
| 1826 #endif  // defined TARGET_ARCH_ARM | 1830 #endif  // defined TARGET_ARCH_ARM | 
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