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Unified Diff: runtime/vm/assembler_arm64.cc

Issue 2974233002: VM: Re-format to use at most one newline between functions (Closed)
Patch Set: Rebase and merge Created 3 years, 5 months ago
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Index: runtime/vm/assembler_arm64.cc
diff --git a/runtime/vm/assembler_arm64.cc b/runtime/vm/assembler_arm64.cc
index 1d12ee89d2411e2c85f2446018e181ee8e8474bd..9b9b1b134fff4ac5fb2ab672c8cb8eb1f79a91c4 100644
--- a/runtime/vm/assembler_arm64.cc
+++ b/runtime/vm/assembler_arm64.cc
@@ -20,7 +20,6 @@ DECLARE_FLAG(bool, inline_alloc);
DEFINE_FLAG(bool, use_far_branches, false, "Always use far branches");
-
Assembler::Assembler(bool use_far_branches)
: buffer_(),
prologue_offset_(-1),
@@ -29,7 +28,6 @@ Assembler::Assembler(bool use_far_branches)
comments_(),
constant_pool_allowed_(false) {}
-
void Assembler::InitializeMemoryWithBreakpoints(uword data, intptr_t length) {
ASSERT(Utils::IsAligned(data, 4));
ASSERT(Utils::IsAligned(length, 4));
@@ -40,39 +38,33 @@ void Assembler::InitializeMemoryWithBreakpoints(uword data, intptr_t length) {
}
}
-
void Assembler::Emit(int32_t value) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
buffer_.Emit<int32_t>(value);
}
-
static const char* cpu_reg_names[kNumberOfCpuRegisters] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
"r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", "r21",
"r22", "r23", "r24", "ip0", "ip1", "pp", "ctx", "fp", "lr", "r31",
};
-
const char* Assembler::RegisterName(Register reg) {
ASSERT((0 <= reg) && (reg < kNumberOfCpuRegisters));
return cpu_reg_names[reg];
}
-
static const char* fpu_reg_names[kNumberOfFpuRegisters] = {
"v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10",
"v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21",
"v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
};
-
const char* Assembler::FpuRegisterName(FpuRegister reg) {
ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
return fpu_reg_names[reg];
}
-
void Assembler::Bind(Label* label) {
ASSERT(!label->IsBound());
const intptr_t bound_pc = buffer_.Size();
@@ -152,7 +144,6 @@ void Assembler::Bind(Label* label) {
label->BindTo(bound_pc);
}
-
void Assembler::Stop(const char* message) {
if (FLAG_print_stop_message) {
UNIMPLEMENTED();
@@ -165,7 +156,6 @@ void Assembler::Stop(const char* message) {
brk(Instr::kStopMessageCode);
}
-
static int CountLeadingZeros(uint64_t value, int width) {
ASSERT((width == 32) || (width == 64));
if (value == 0) {
@@ -178,7 +168,6 @@ static int CountLeadingZeros(uint64_t value, int width) {
return width - count;
}
-
static int CountOneBits(uint64_t value, int width) {
// Mask out unused bits to ensure that they are not counted.
value &= (0xffffffffffffffffULL >> (64 - width));
@@ -193,7 +182,6 @@ static int CountOneBits(uint64_t value, int width) {
return value;
}
-
// Test if a given value can be encoded in the immediate field of a logical
// instruction.
// If it can be encoded, the function returns true, and values pointed to by n,
@@ -295,7 +283,6 @@ bool Operand::IsImmLogical(uint64_t value, uint8_t width, Operand* imm_op) {
}
}
-
void Assembler::LoadPoolPointer(Register pp) {
CheckCodePointer();
ldr(pp, FieldAddress(CODE_REG, Code::object_pool_offset()));
@@ -310,7 +297,6 @@ void Assembler::LoadPoolPointer(Register pp) {
set_constant_pool_allowed(pp == PP);
}
-
void Assembler::LoadWordFromPoolOffset(Register dst,
uint32_t offset,
Register pp) {
@@ -337,7 +323,6 @@ void Assembler::LoadWordFromPoolOffset(Register dst,
}
}
-
void Assembler::LoadWordFromPoolOffsetFixed(Register dst, uint32_t offset) {
ASSERT(constant_pool_allowed());
ASSERT(dst != PP);
@@ -352,12 +337,10 @@ void Assembler::LoadWordFromPoolOffsetFixed(Register dst, uint32_t offset) {
ldr(dst, Address(dst, lower12));
}
-
intptr_t Assembler::FindImmediate(int64_t imm) {
return object_pool_wrapper_.FindImmediate(imm);
}
-
bool Assembler::CanLoadFromObjectPool(const Object& object) const {
ASSERT(!object.IsICData() || ICData::Cast(object).IsOriginal());
ASSERT(!object.IsField() || Field::Cast(object).IsOriginal());
@@ -378,19 +361,16 @@ bool Assembler::CanLoadFromObjectPool(const Object& object) const {
return true;
}
-
void Assembler::LoadNativeEntry(Register dst, const ExternalLabel* label) {
const int32_t offset = ObjectPool::element_offset(
object_pool_wrapper_.FindNativeEntry(label, kNotPatchable));
LoadWordFromPoolOffset(dst, offset);
}
-
void Assembler::LoadIsolate(Register dst) {
ldr(dst, Address(THR, Thread::isolate_offset()));
}
-
void Assembler::LoadObjectHelper(Register dst,
const Object& object,
bool is_unique) {
@@ -409,7 +389,6 @@ void Assembler::LoadObjectHelper(Register dst,
}
}
-
void Assembler::LoadFunctionFromCalleePool(Register dst,
const Function& function,
Register new_pp) {
@@ -421,17 +400,14 @@ void Assembler::LoadFunctionFromCalleePool(Register dst,
ldr(dst, Address(new_pp, offset));
}
-
void Assembler::LoadObject(Register dst, const Object& object) {
LoadObjectHelper(dst, object, false);
}
-
void Assembler::LoadUniqueObject(Register dst, const Object& object) {
LoadObjectHelper(dst, object, true);
}
-
void Assembler::CompareObject(Register reg, const Object& object) {
ASSERT(!object.IsICData() || ICData::Cast(object).IsOriginal());
ASSERT(!object.IsField() || Field::Cast(object).IsOriginal());
@@ -447,7 +423,6 @@ void Assembler::CompareObject(Register reg, const Object& object) {
}
}
-
void Assembler::LoadDecodableImmediate(Register reg, int64_t imm) {
if (constant_pool_allowed()) {
const int32_t offset = ObjectPool::element_offset(FindImmediate(imm));
@@ -459,7 +434,6 @@ void Assembler::LoadDecodableImmediate(Register reg, int64_t imm) {
}
}
-
void Assembler::LoadImmediateFixed(Register reg, int64_t imm) {
const uint32_t w0 = Utils::Low32Bits(imm);
const uint32_t w1 = Utils::High32Bits(imm);
@@ -473,7 +447,6 @@ void Assembler::LoadImmediateFixed(Register reg, int64_t imm) {
movk(reg, Immediate(h3), 3);
}
-
void Assembler::LoadImmediate(Register reg, int64_t imm) {
Comment("LoadImmediate");
// Is it 0?
@@ -560,7 +533,6 @@ void Assembler::LoadImmediate(Register reg, int64_t imm) {
}
}
-
void Assembler::LoadDImmediate(VRegister vd, double immd) {
if (!fmovdi(vd, immd)) {
int64_t imm = bit_cast<int64_t, double>(immd);
@@ -569,7 +541,6 @@ void Assembler::LoadDImmediate(VRegister vd, double immd) {
}
}
-
void Assembler::Branch(const StubEntry& stub_entry,
Register pp,
Patchability patchable) {
@@ -585,7 +556,6 @@ void Assembler::BranchPatchable(const StubEntry& stub_entry) {
Branch(stub_entry, PP, kPatchable);
}
-
void Assembler::BranchLink(const StubEntry& stub_entry,
Patchability patchable) {
const Code& target = Code::ZoneHandle(stub_entry.code());
@@ -596,19 +566,16 @@ void Assembler::BranchLink(const StubEntry& stub_entry,
blr(TMP);
}
-
void Assembler::BranchLinkPatchable(const StubEntry& stub_entry) {
BranchLink(stub_entry, kPatchable);
}
-
void Assembler::BranchLinkToRuntime() {
ldr(LR, Address(THR, Thread::call_to_runtime_entry_point_offset()));
ldr(CODE_REG, Address(THR, Thread::call_to_runtime_stub_offset()));
blr(LR);
}
-
void Assembler::BranchLinkWithEquivalence(const StubEntry& stub_entry,
const Object& equivalence) {
const Code& target = Code::ZoneHandle(stub_entry.code());
@@ -619,7 +586,6 @@ void Assembler::BranchLinkWithEquivalence(const StubEntry& stub_entry,
blr(TMP);
}
-
void Assembler::AddImmediate(Register dest, Register rn, int64_t imm) {
Operand op;
if (imm == 0) {
@@ -641,7 +607,6 @@ void Assembler::AddImmediate(Register dest, Register rn, int64_t imm) {
}
}
-
void Assembler::AddImmediateSetFlags(Register dest, Register rn, int64_t imm) {
Operand op;
if (Operand::CanHold(imm, kXRegSizeInBits, &op) == Operand::Immediate) {
@@ -659,7 +624,6 @@ void Assembler::AddImmediateSetFlags(Register dest, Register rn, int64_t imm) {
}
}
-
void Assembler::SubImmediateSetFlags(Register dest, Register rn, int64_t imm) {
Operand op;
if (Operand::CanHold(imm, kXRegSizeInBits, &op) == Operand::Immediate) {
@@ -677,7 +641,6 @@ void Assembler::SubImmediateSetFlags(Register dest, Register rn, int64_t imm) {
}
}
-
void Assembler::AndImmediate(Register rd, Register rn, int64_t imm) {
Operand imm_op;
if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) {
@@ -688,7 +651,6 @@ void Assembler::AndImmediate(Register rd, Register rn, int64_t imm) {
}
}
-
void Assembler::OrImmediate(Register rd, Register rn, int64_t imm) {
Operand imm_op;
if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) {
@@ -699,7 +661,6 @@ void Assembler::OrImmediate(Register rd, Register rn, int64_t imm) {
}
}
-
void Assembler::XorImmediate(Register rd, Register rn, int64_t imm) {
Operand imm_op;
if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) {
@@ -710,7 +671,6 @@ void Assembler::XorImmediate(Register rd, Register rn, int64_t imm) {
}
}
-
void Assembler::TestImmediate(Register rn, int64_t imm) {
Operand imm_op;
if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) {
@@ -721,7 +681,6 @@ void Assembler::TestImmediate(Register rn, int64_t imm) {
}
}
-
void Assembler::CompareImmediate(Register rn, int64_t imm) {
Operand op;
if (Operand::CanHold(imm, kXRegSizeInBits, &op) == Operand::Immediate) {
@@ -736,7 +695,6 @@ void Assembler::CompareImmediate(Register rn, int64_t imm) {
}
}
-
void Assembler::LoadFromOffset(Register dest,
Register base,
int32_t offset,
@@ -750,7 +708,6 @@ void Assembler::LoadFromOffset(Register dest,
}
}
-
void Assembler::LoadDFromOffset(VRegister dest, Register base, int32_t offset) {
if (Address::CanHoldOffset(offset, Address::Offset, kDWord)) {
fldrd(dest, Address(base, offset, Address::Offset, kDWord));
@@ -761,7 +718,6 @@ void Assembler::LoadDFromOffset(VRegister dest, Register base, int32_t offset) {
}
}
-
void Assembler::LoadQFromOffset(VRegister dest, Register base, int32_t offset) {
if (Address::CanHoldOffset(offset, Address::Offset, kQWord)) {
fldrq(dest, Address(base, offset, Address::Offset, kQWord));
@@ -772,7 +728,6 @@ void Assembler::LoadQFromOffset(VRegister dest, Register base, int32_t offset) {
}
}
-
void Assembler::StoreToOffset(Register src,
Register base,
int32_t offset,
@@ -787,7 +742,6 @@ void Assembler::StoreToOffset(Register src,
}
}
-
void Assembler::StoreDToOffset(VRegister src, Register base, int32_t offset) {
if (Address::CanHoldOffset(offset, Address::Offset, kDWord)) {
fstrd(src, Address(base, offset, Address::Offset, kDWord));
@@ -798,7 +752,6 @@ void Assembler::StoreDToOffset(VRegister src, Register base, int32_t offset) {
}
}
-
void Assembler::StoreQToOffset(VRegister src, Register base, int32_t offset) {
if (Address::CanHoldOffset(offset, Address::Offset, kQWord)) {
fstrq(src, Address(base, offset, Address::Offset, kQWord));
@@ -809,7 +762,6 @@ void Assembler::StoreQToOffset(VRegister src, Register base, int32_t offset) {
}
}
-
void Assembler::VRecps(VRegister vd, VRegister vn) {
ASSERT(vn != VTMP);
ASSERT(vd != VTMP);
@@ -823,7 +775,6 @@ void Assembler::VRecps(VRegister vd, VRegister vn) {
vmuls(vd, vd, VTMP);
}
-
void Assembler::VRSqrts(VRegister vd, VRegister vn) {
ASSERT(vd != VTMP);
ASSERT(vn != VTMP);
@@ -841,7 +792,6 @@ void Assembler::VRSqrts(VRegister vd, VRegister vn) {
vmuls(vd, vd, VTMP);
}
-
// Store into object.
// Preserves object and value registers.
void Assembler::StoreIntoObjectFilterNoSmi(Register object,
@@ -859,7 +809,6 @@ void Assembler::StoreIntoObjectFilterNoSmi(Register object,
b(no_update, EQ);
}
-
// Preserves object and value registers.
void Assembler::StoreIntoObjectFilter(Register object,
Register value,
@@ -873,7 +822,6 @@ void Assembler::StoreIntoObjectFilter(Register object,
b(no_update, EQ);
}
-
void Assembler::StoreIntoObjectOffset(Register object,
int32_t offset,
Register value,
@@ -887,7 +835,6 @@ void Assembler::StoreIntoObjectOffset(Register object,
}
}
-
void Assembler::StoreIntoObject(Register object,
const Address& dest,
Register value,
@@ -920,7 +867,6 @@ void Assembler::StoreIntoObject(Register object,
Bind(&done);
}
-
void Assembler::StoreIntoObjectNoBarrier(Register object,
const Address& dest,
Register value) {
@@ -934,7 +880,6 @@ void Assembler::StoreIntoObjectNoBarrier(Register object,
// No store buffer update.
}
-
void Assembler::StoreIntoObjectOffsetNoBarrier(Register object,
int32_t offset,
Register value) {
@@ -946,7 +891,6 @@ void Assembler::StoreIntoObjectOffsetNoBarrier(Register object,
}
}
-
void Assembler::StoreIntoObjectNoBarrier(Register object,
const Address& dest,
const Object& value) {
@@ -959,7 +903,6 @@ void Assembler::StoreIntoObjectNoBarrier(Register object,
str(TMP2, dest);
}
-
void Assembler::StoreIntoObjectOffsetNoBarrier(Register object,
int32_t offset,
const Object& value) {
@@ -971,7 +914,6 @@ void Assembler::StoreIntoObjectOffsetNoBarrier(Register object,
}
}
-
void Assembler::LoadClassId(Register result, Register object) {
ASSERT(RawObject::kClassIdTagPos == 16);
ASSERT(RawObject::kClassIdTagSize == 16);
@@ -981,7 +923,6 @@ void Assembler::LoadClassId(Register result, Register object) {
kUnsignedHalfword);
}
-
void Assembler::LoadClassById(Register result, Register class_id) {
ASSERT(result != class_id);
LoadIsolate(result);
@@ -991,20 +932,17 @@ void Assembler::LoadClassById(Register result, Register class_id) {
ldr(result, Address(result, class_id, UXTX, Address::Scaled));
}
-
void Assembler::LoadClass(Register result, Register object) {
ASSERT(object != TMP);
LoadClassId(TMP, object);
LoadClassById(result, TMP);
}
-
void Assembler::CompareClassId(Register object, intptr_t class_id) {
LoadClassId(TMP, object);
CompareImmediate(TMP, class_id);
}
-
void Assembler::LoadClassIdMayBeSmi(Register result, Register object) {
// Load up a null object. We only need it so we can use LoadClassId on it in
// the case that object is a Smi..
@@ -1022,14 +960,12 @@ void Assembler::LoadClassIdMayBeSmi(Register result, Register object) {
csel(result, TMP, result, EQ);
}
-
void Assembler::LoadTaggedClassIdMayBeSmi(Register result, Register object) {
LoadClassIdMayBeSmi(result, object);
// Finally, tag the result.
SmiTag(result);
}
-
// Frame entry and exit.
void Assembler::ReserveAlignedFrameSpace(intptr_t frame_space) {
// Reserve space for arguments and align frame before entering
@@ -1042,13 +978,11 @@ void Assembler::ReserveAlignedFrameSpace(intptr_t frame_space) {
}
}
-
void Assembler::RestoreCodePointer() {
ldr(CODE_REG, Address(FP, kPcMarkerSlotFromFp * kWordSize));
CheckCodePointer();
}
-
void Assembler::CheckCodePointer() {
#ifdef DEBUG
if (!FLAG_check_code_pointer) {
@@ -1074,17 +1008,14 @@ void Assembler::CheckCodePointer() {
#endif
}
-
void Assembler::SetupDartSP() {
mov(SP, CSP);
}
-
void Assembler::RestoreCSP() {
mov(CSP, SP);
}
-
void Assembler::EnterFrame(intptr_t frame_size) {
// The ARM64 ABI requires at all times
// - stack limit < CSP <= stack base
@@ -1110,13 +1041,11 @@ void Assembler::EnterFrame(intptr_t frame_size) {
}
}
-
void Assembler::LeaveFrame() {
mov(SP, FP);
PopPair(FP, LR); // low: FP, high: LR.
}
-
void Assembler::EnterDartFrame(intptr_t frame_size, Register new_pp) {
ASSERT(!constant_pool_allowed());
// Setup the frame.
@@ -1137,7 +1066,6 @@ void Assembler::EnterDartFrame(intptr_t frame_size, Register new_pp) {
}
}
-
// On entry to a function compiled for OSR, the caller's frame pointer, the
// stack locals, and any copied parameters are already in place. The frame
// pointer is already set up. The PC marker is not correct for the
@@ -1154,7 +1082,6 @@ void Assembler::EnterOsrFrame(intptr_t extra_size, Register new_pp) {
}
}
-
void Assembler::LeaveDartFrame(RestorePP restore_pp) {
if (restore_pp == kRestoreCallerPP) {
set_constant_pool_allowed(false);
@@ -1165,7 +1092,6 @@ void Assembler::LeaveDartFrame(RestorePP restore_pp) {
LeaveFrame();
}
-
void Assembler::EnterCallRuntimeFrame(intptr_t frame_size) {
Comment("EnterCallRuntimeFrame");
EnterStubFrame();
@@ -1191,7 +1117,6 @@ void Assembler::EnterCallRuntimeFrame(intptr_t frame_size) {
ReserveAlignedFrameSpace(frame_size);
}
-
void Assembler::LeaveCallRuntimeFrame() {
// SP might have been modified to reserve space for arguments
// and ensure proper alignment of the stack frame.
@@ -1220,23 +1145,19 @@ void Assembler::LeaveCallRuntimeFrame() {
LeaveStubFrame();
}
-
void Assembler::CallRuntime(const RuntimeEntry& entry,
intptr_t argument_count) {
entry.Call(this, argument_count);
}
-
void Assembler::EnterStubFrame() {
EnterDartFrame(0);
}
-
void Assembler::LeaveStubFrame() {
LeaveDartFrame();
}
-
// R0 receiver, R5 guarded cid as Smi
void Assembler::MonomorphicCheckedEntry() {
ASSERT(has_single_entry_point_);
@@ -1271,7 +1192,6 @@ void Assembler::MonomorphicCheckedEntry() {
set_use_far_branches(saved_use_far_branches);
}
-
#ifndef PRODUCT
void Assembler::MaybeTraceAllocation(intptr_t cid,
Register temp_reg,
@@ -1288,7 +1208,6 @@ void Assembler::MaybeTraceAllocation(intptr_t cid,
b(trace, NE);
}
-
void Assembler::UpdateAllocationStats(intptr_t cid, Heap::Space space) {
ASSERT(cid > 0);
intptr_t counter_offset =
@@ -1303,7 +1222,6 @@ void Assembler::UpdateAllocationStats(intptr_t cid, Heap::Space space) {
str(TMP, Address(TMP2, 0));
}
-
void Assembler::UpdateAllocationStatsWithSize(intptr_t cid,
Register size_reg,
Heap::Space space) {
@@ -1331,7 +1249,6 @@ void Assembler::UpdateAllocationStatsWithSize(intptr_t cid,
}
#endif // !PRODUCT
-
void Assembler::TryAllocate(const Class& cls,
Label* failure,
Register instance_reg,
@@ -1376,7 +1293,6 @@ void Assembler::TryAllocate(const Class& cls,
}
}
-
void Assembler::TryAllocateArray(intptr_t cid,
intptr_t instance_size,
Label* failure,
@@ -1424,7 +1340,6 @@ void Assembler::TryAllocateArray(intptr_t cid,
}
}
-
Address Assembler::ElementAddressForIntIndex(bool is_external,
intptr_t cid,
intptr_t index_scale,
@@ -1439,7 +1354,6 @@ Address Assembler::ElementAddressForIntIndex(bool is_external,
return Address(array, static_cast<int32_t>(offset), Address::Offset, size);
}
-
void Assembler::LoadElementAddressForIntIndex(Register address,
bool is_external,
intptr_t cid,
@@ -1452,7 +1366,6 @@ void Assembler::LoadElementAddressForIntIndex(Register address,
AddImmediate(address, array, offset);
}
-
Address Assembler::ElementAddressForRegIndex(bool is_load,
bool is_external,
intptr_t cid,
@@ -1479,7 +1392,6 @@ Address Assembler::ElementAddressForRegIndex(bool is_load,
return Address(base, offset, Address::Offset, size);
}
-
void Assembler::LoadElementAddressForRegIndex(Register address,
bool is_load,
bool is_external,
@@ -1504,7 +1416,6 @@ void Assembler::LoadElementAddressForRegIndex(Register address,
}
}
-
void Assembler::LoadUnaligned(Register dst,
Register addr,
Register tmp,
@@ -1547,7 +1458,6 @@ void Assembler::LoadUnaligned(Register dst,
UNIMPLEMENTED();
}
-
void Assembler::StoreUnaligned(Register src,
Register addr,
Register tmp,
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