VM: Re-format to use at most one newline between functions

runtime/vm/simulator_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include <setjmp.h>  // NOLINT
 #include <stdlib.h>
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 // Only build the simulator if not compiling for real ARM hardware.
 #if defined(USING_SIMULATOR)
 
 #include "vm/simulator.h"
 
 #include "vm/assembler.h"
 #include "vm/constants_arm.h"
 #include "vm/cpu.h"
 #include "vm/disassembler.h"
 #include "vm/lockers.h"
 #include "vm/native_arguments.h"
+#include "vm/os_thread.h"
 #include "vm/stack_frame.h"
-#include "vm/os_thread.h"
 
 namespace dart {
 
 DEFINE_FLAG(uint64_t,
             trace_sim_after,
             ULLONG_MAX,
             "Trace simulator execution after instruction count reached.");
 DEFINE_FLAG(uint64_t,
             stop_sim_at,
             ULLONG_MAX,
             "Instruction address or instruction count to stop simulator at.");
 
-
 // This macro provides a platform independent use of sscanf. The reason for
 // SScanF not being implemented in a platform independent way through
 // OS in the same way as SNPrint is that the Windows C Run-Time
 // Library does not provide vsscanf.
 #define SScanF sscanf  // NOLINT
 
-
 // SimulatorSetjmpBuffer are linked together, and the last created one
 // is referenced by the Simulator. When an exception is thrown, the exception
 // runtime looks at where to jump and finds the corresponding
 // SimulatorSetjmpBuffer based on the stack pointer of the exception handler.
 // The runtime then does a Longjmp on that buffer to return to the simulator.
 class SimulatorSetjmpBuffer {
  public:
   void Longjmp() {
     // "This" is now the last setjmp buffer.
     simulator_->set_last_setjmp_buffer(this);
@@ skipping 18 matching lines @@
 
  private:
   uword sp_;
   Simulator* simulator_;
   SimulatorSetjmpBuffer* link_;
   jmp_buf buffer_;
 
   friend class Simulator;
 };
 
-
 // The SimulatorDebugger class is used by the simulator while debugging
 // simulated ARM code.
 class SimulatorDebugger {
  public:
   explicit SimulatorDebugger(Simulator* sim);
   ~SimulatorDebugger();
 
   void Stop(Instr* instr, const char* message);
   void Debug();
   char* ReadLine(const char* prompt);
@@ skipping 19 matching lines @@
   // Set or delete a breakpoint. Returns true if successful.
   bool SetBreakpoint(Instr* breakpc);
   bool DeleteBreakpoint(Instr* breakpc);
 
   // Undo and redo all breakpoints. This is needed to bracket disassembly and
   // execution to skip past breakpoints when run from the debugger.
   void UndoBreakpoints();
   void RedoBreakpoints();
 };
 
-
 SimulatorDebugger::SimulatorDebugger(Simulator* sim) {
   sim_ = sim;
 }
 
-
 SimulatorDebugger::~SimulatorDebugger() {}
 
-
 void SimulatorDebugger::Stop(Instr* instr, const char* message) {
   OS::Print("Simulator hit %s\n", message);
   Debug();
 }
 
-
 static Register LookupCpuRegisterByName(const char* name) {
   static const char* kNames[] = {"r0",  "r1",  "r2",  "r3",  "r4",  "r5",
                                  "r6",  "r7",  "r8",  "r9",  "r10", "r11",
                                  "r12", "r13", "r14", "r15", "pc",  "lr",
                                  "sp",  "ip",  "fp",  "pp",  "ctx"};
   static const Register kRegisters[] = {R0, R1, R2,  R3,  R4,  R5,  R6,  R7,
                                         R8, R9, R10, R11, R12, R13, R14, R15,
                                         PC, LR, SP,  IP,  FP,  PP,  CTX};
   ASSERT(ARRAY_SIZE(kNames) == ARRAY_SIZE(kRegisters));
   for (unsigned i = 0; i < ARRAY_SIZE(kNames); i++) {
     if (strcmp(kNames[i], name) == 0) {
       return kRegisters[i];
     }
   }
   return kNoRegister;
 }
 
-
 static SRegister LookupSRegisterByName(const char* name) {
   int reg_nr = -1;
   bool ok = SScanF(name, "s%d", &reg_nr);
   if (ok && (0 <= reg_nr) && (reg_nr < kNumberOfSRegisters)) {
     return static_cast<SRegister>(reg_nr);
   }
   return kNoSRegister;
 }
 
-
 static DRegister LookupDRegisterByName(const char* name) {
   int reg_nr = -1;
   bool ok = SScanF(name, "d%d", &reg_nr);
   if (ok && (0 <= reg_nr) && (reg_nr < kNumberOfDRegisters)) {
     return static_cast<DRegister>(reg_nr);
   }
   return kNoDRegister;
 }
 
-
 bool SimulatorDebugger::GetValue(char* desc, uint32_t* value) {
   Register reg = LookupCpuRegisterByName(desc);
   if (reg != kNoRegister) {
     if (reg == PC) {
       *value = sim_->get_pc();
     } else {
       *value = sim_->get_register(reg);
     }
     return true;
   }
   if (desc[0] == '*') {
     uint32_t addr;
     if (GetValue(desc + 1, &addr)) {
       if (Simulator::IsIllegalAddress(addr)) {
         return false;
       }
       *value = *(reinterpret_cast<uint32_t*>(addr));
       return true;
     }
   }
   bool retval = SScanF(desc, "0x%x", value) == 1;
   if (!retval) {
     retval = SScanF(desc, "%x", value) == 1;
   }
   return retval;
 }
 
-
 bool SimulatorDebugger::GetFValue(char* desc, float* value) {
   SRegister sreg = LookupSRegisterByName(desc);
   if (sreg != kNoSRegister) {
     *value = sim_->get_sregister(sreg);
     return true;
   }
   if (desc[0] == '*') {
     uint32_t addr;
     if (GetValue(desc + 1, &addr)) {
       if (Simulator::IsIllegalAddress(addr)) {
         return false;
       }
       *value = *(reinterpret_cast<float*>(addr));
       return true;
     }
   }
   return false;
 }
 
-
 bool SimulatorDebugger::GetDValue(char* desc, double* value) {
   DRegister dreg = LookupDRegisterByName(desc);
   if (dreg != kNoDRegister) {
     *value = sim_->get_dregister(dreg);
     return true;
   }
   if (desc[0] == '*') {
     uint32_t addr;
     if (GetValue(desc + 1, &addr)) {
       if (Simulator::IsIllegalAddress(addr)) {
         return false;
       }
       *value = *(reinterpret_cast<double*>(addr));
       return true;
     }
   }
   return false;
 }
 
-
 TokenPosition SimulatorDebugger::GetApproximateTokenIndex(const Code& code,
                                                           uword pc) {
   TokenPosition token_pos = TokenPosition::kNoSource;
   uword pc_offset = pc - code.PayloadStart();
   const PcDescriptors& descriptors =
       PcDescriptors::Handle(code.pc_descriptors());
   PcDescriptors::Iterator iter(descriptors, RawPcDescriptors::kAnyKind);
   while (iter.MoveNext()) {
     if (iter.PcOffset() == pc_offset) {
       return iter.TokenPos();
     } else if (!token_pos.IsReal() && (iter.PcOffset() > pc_offset)) {
       token_pos = iter.TokenPos();
     }
   }
   return token_pos;
 }
 
-
 void SimulatorDebugger::PrintDartFrame(uword pc,
                                        uword fp,
                                        uword sp,
                                        const Function& function,
                                        TokenPosition token_pos,
                                        bool is_optimized,
                                        bool is_inlined) {
   const Script& script = Script::Handle(function.script());
   const String& func_name = String::Handle(function.QualifiedScrubbedName());
   const String& url = String::Handle(script.url());
   intptr_t line = -1;
   intptr_t column = -1;
   if (token_pos.IsReal()) {
     script.GetTokenLocation(token_pos, &line, &column);
   }
   OS::Print(
       "pc=0x%" Px " fp=0x%" Px " sp=0x%" Px " %s%s (%s:%" Pd ":%" Pd ")\n", pc,
       fp, sp, is_optimized ? (is_inlined ? "inlined " : "optimized ") : "",
       func_name.ToCString(), url.ToCString(), line, column);
 }
 
-
 void SimulatorDebugger::PrintBacktrace() {
   StackFrameIterator frames(
       sim_->get_register(FP), sim_->get_register(SP), sim_->get_pc(),
       StackFrameIterator::kDontValidateFrames, Thread::Current(),
       StackFrameIterator::kNoCrossThreadIteration);
   StackFrame* frame = frames.NextFrame();
   ASSERT(frame != NULL);
   Function& function = Function::Handle();
   Function& inlined_function = Function::Handle();
   Code& code = Code::Handle();
@@ skipping 31 matching lines @@
                 frame->IsEntryFrame()
                     ? "entry"
                     : frame->IsExitFrame()
                           ? "exit"
                           : frame->IsStubFrame() ? "stub" : "invalid");
     }
     frame = frames.NextFrame();
   }
 }
 
-
 bool SimulatorDebugger::SetBreakpoint(Instr* breakpc) {
   // Check if a breakpoint can be set. If not return without any side-effects.
   if (sim_->break_pc_ != NULL) {
     return false;
   }
 
   // Set the breakpoint.
   sim_->break_pc_ = breakpc;
   sim_->break_instr_ = breakpc->InstructionBits();
   // Not setting the breakpoint instruction in the code itself. It will be set
   // when the debugger shell continues.
   return true;
 }
 
-
 bool SimulatorDebugger::DeleteBreakpoint(Instr* breakpc) {
   if (sim_->break_pc_ != NULL) {
     sim_->break_pc_->SetInstructionBits(sim_->break_instr_);
   }
 
   sim_->break_pc_ = NULL;
   sim_->break_instr_ = 0;
   return true;
 }
 
-
 void SimulatorDebugger::UndoBreakpoints() {
   if (sim_->break_pc_ != NULL) {
     sim_->break_pc_->SetInstructionBits(sim_->break_instr_);
   }
 }
 
-
 void SimulatorDebugger::RedoBreakpoints() {
   if (sim_->break_pc_ != NULL) {
     sim_->break_pc_->SetInstructionBits(Instr::kSimulatorBreakpointInstruction);
   }
 }
 
-
 void SimulatorDebugger::Debug() {
   intptr_t last_pc = -1;
   bool done = false;
 
 #define COMMAND_SIZE 63
 #define ARG_SIZE 255
 
 #define STR(a) #a
 #define XSTR(a) STR(a)
 
@@ skipping 229 matching lines @@
   // shell when hit.
   RedoBreakpoints();
 
 #undef COMMAND_SIZE
 #undef ARG_SIZE
 
 #undef STR
 #undef XSTR
 }
 
-
 char* SimulatorDebugger::ReadLine(const char* prompt) {
   char* result = NULL;
   char line_buf[256];
   intptr_t offset = 0;
   bool keep_going = true;
   OS::Print("%s", prompt);
   while (keep_going) {
     if (fgets(line_buf, sizeof(line_buf), stdin) == NULL) {
       // fgets got an error. Just give up.
       if (result != NULL) {
@@ skipping 38 matching lines @@
     }
     // Copy the newly read line into the result.
     memmove(result + offset, line_buf, len);
     offset += len;
   }
   ASSERT(result != NULL);
   result[offset] = '\0';
   return result;
 }
 
-
 // Synchronization primitives support.
 Mutex* Simulator::exclusive_access_lock_ = NULL;
 Simulator::AddressTag Simulator::exclusive_access_state_[kNumAddressTags] = {
     {NULL, 0}};
 int Simulator::next_address_tag_ = 0;
 
-
 void Simulator::InitOnce() {
   // Setup exclusive access state lock.
   exclusive_access_lock_ = new Mutex();
 }
 
-
 Simulator::Simulator() {
   // Setup simulator support first. Some of this information is needed to
   // setup the architecture state.
   // We allocate the stack here, the size is computed as the sum of
   // the size specified by the user and the buffer space needed for
   // handling stack overflow exceptions. To be safe in potential
   // stack underflows we also add some underflow buffer space.
   stack_ =
       new char[(OSThread::GetSpecifiedStackSize() + OSThread::kStackSizeBuffer +
                 kSimulatorStackUnderflowSize)];
@@ skipping 31 matching lines @@
   ASSERT(2 * kNumberOfDRegisters >= kNumberOfSRegisters);
   for (int i = 0; i < kNumberOfSRegisters; i++) {
     ASSERT(sregisters_[i] == 0.0);
   }
   fp_n_flag_ = false;
   fp_z_flag_ = false;
   fp_c_flag_ = false;
   fp_v_flag_ = false;
 }
 
-
 Simulator::~Simulator() {
   delete[] stack_;
   Isolate* isolate = Isolate::Current();
   if (isolate != NULL) {
     isolate->set_simulator(NULL);
   }
 }
 
-
 // When the generated code calls an external reference we need to catch that in
 // the simulator.  The external reference will be a function compiled for the
 // host architecture.  We need to call that function instead of trying to
 // execute it with the simulator.  We do that by redirecting the external
 // reference to a svc (supervisor call) instruction that is handled by
 // the simulator.  We write the original destination of the jump just at a known
 // offset from the svc instruction so the simulator knows what to call.
 class Redirection {
  public:
   uword address_of_svc_instruction() {
@@ skipping 54 matching lines @@
   }
 
   uword external_function_;
   Simulator::CallKind call_kind_;
   int argument_count_;
   uint32_t svc_instruction_;
   Redirection* next_;
   static Redirection* list_;
 };
 
-
 Redirection* Redirection::list_ = NULL;
 
-
 uword Simulator::RedirectExternalReference(uword function,
                                            CallKind call_kind,
                                            int argument_count) {
   Redirection* redirection =
       Redirection::Get(function, call_kind, argument_count);
   return redirection->address_of_svc_instruction();
 }
 
-
 uword Simulator::FunctionForRedirect(uword redirect) {
   return Redirection::FunctionForRedirect(redirect);
 }
 
-
 // Get the active Simulator for the current isolate.
 Simulator* Simulator::Current() {
   Simulator* simulator = Isolate::Current()->simulator();
   if (simulator == NULL) {
     simulator = new Simulator();
     Isolate::Current()->set_simulator(simulator);
   }
   return simulator;
 }
 
-
 // Sets the register in the architecture state. It will also deal with updating
 // Simulator internal state for special registers such as PC.
 void Simulator::set_register(Register reg, int32_t value) {
   ASSERT((reg >= 0) && (reg < kNumberOfCpuRegisters));
   if (reg == PC) {
     pc_modified_ = true;
   }
   registers_[reg] = value;
 }
 
-
 // Get the register from the architecture state. This function does handle
 // the special case of accessing the PC register.
 int32_t Simulator::get_register(Register reg) const {
   ASSERT((reg >= 0) && (reg < kNumberOfCpuRegisters));
   return registers_[reg] + ((reg == PC) ? Instr::kPCReadOffset : 0);
 }
 
-
 // Raw access to the PC register.
 void Simulator::set_pc(int32_t value) {
   pc_modified_ = true;
   registers_[PC] = value;
 }
 
-
 // Raw access to the PC register without the special adjustment when reading.
 int32_t Simulator::get_pc() const {
   return registers_[PC];
 }
 
-
 // Accessors for VFP register state.
 void Simulator::set_sregister(SRegister reg, float value) {
   ASSERT(TargetCPUFeatures::vfp_supported());
   ASSERT((reg >= 0) && (reg < kNumberOfSRegisters));
   sregisters_[reg] = bit_cast<int32_t, float>(value);
 }
 
-
 float Simulator::get_sregister(SRegister reg) const {
   ASSERT(TargetCPUFeatures::vfp_supported());
   ASSERT((reg >= 0) && (reg < kNumberOfSRegisters));
   return bit_cast<float, int32_t>(sregisters_[reg]);
 }
 
-
 void Simulator::set_dregister(DRegister reg, double value) {
   ASSERT(TargetCPUFeatures::vfp_supported());
   ASSERT((reg >= 0) && (reg < kNumberOfDRegisters));
   dregisters_[reg] = bit_cast<int64_t, double>(value);
 }
 
-
 double Simulator::get_dregister(DRegister reg) const {
   ASSERT(TargetCPUFeatures::vfp_supported());
   ASSERT((reg >= 0) && (reg < kNumberOfDRegisters));
   return bit_cast<double, int64_t>(dregisters_[reg]);
 }
 
-
 void Simulator::set_qregister(QRegister reg, const simd_value_t& value) {
   ASSERT(TargetCPUFeatures::neon_supported());
   ASSERT((reg >= 0) && (reg < kNumberOfQRegisters));
   qregisters_[reg].data_[0] = value.data_[0];
   qregisters_[reg].data_[1] = value.data_[1];
   qregisters_[reg].data_[2] = value.data_[2];
   qregisters_[reg].data_[3] = value.data_[3];
 }
 
-
 void Simulator::get_qregister(QRegister reg, simd_value_t* value) const {
   ASSERT(TargetCPUFeatures::neon_supported());
   // TODO(zra): Replace this test with an assert after we support
   // 16 Q registers.
   if ((reg >= 0) && (reg < kNumberOfQRegisters)) {
     *value = qregisters_[reg];
   }
 }
 
-
 void Simulator::set_sregister_bits(SRegister reg, int32_t value) {
   ASSERT(TargetCPUFeatures::vfp_supported());
   ASSERT((reg >= 0) && (reg < kNumberOfSRegisters));
   sregisters_[reg] = value;
 }
 
-
 int32_t Simulator::get_sregister_bits(SRegister reg) const {
   ASSERT(TargetCPUFeatures::vfp_supported());
   ASSERT((reg >= 0) && (reg < kNumberOfSRegisters));
   return sregisters_[reg];
 }
 
-
 void Simulator::set_dregister_bits(DRegister reg, int64_t value) {
   ASSERT(TargetCPUFeatures::vfp_supported());
   ASSERT((reg >= 0) && (reg < kNumberOfDRegisters));
   dregisters_[reg] = value;
 }
 
-
 int64_t Simulator::get_dregister_bits(DRegister reg) const {
   ASSERT(TargetCPUFeatures::vfp_supported());
   ASSERT((reg >= 0) && (reg < kNumberOfDRegisters));
   return dregisters_[reg];
 }
 
-
 void Simulator::HandleIllegalAccess(uword addr, Instr* instr) {
   uword fault_pc = get_pc();
   // The debugger will not be able to single step past this instruction, but
   // it will be possible to disassemble the code and inspect registers.
   char buffer[128];
   snprintf(buffer, sizeof(buffer),
            "illegal memory access at 0x%" Px ", pc=0x%" Px "\n", addr,
            fault_pc);
   SimulatorDebugger dbg(this);
   dbg.Stop(instr, buffer);
   // The debugger will return control in non-interactive mode.
   FATAL("Cannot continue execution after illegal memory access.");
 }
 
-
 // Processor versions prior to ARMv7 could not do unaligned reads and writes.
 // On some ARM platforms an interrupt is caused.  On others it does a funky
 // rotation thing.  However, from version v7, unaligned access is supported.
 // Note that simulator runs have the runtime system running directly on the host
 // system and only generated code is executed in the simulator.  Since the host
 // is typically IA32 we will get the correct ARMv7-like behaviour on unaligned
 // accesses, but we should actually not generate code accessing unaligned data,
 // so we still want to know and abort if we encounter such code.
 void Simulator::UnalignedAccess(const char* msg, uword addr, Instr* instr) {
   // The debugger will not be able to single step past this instruction, but
   // it will be possible to disassemble the code and inspect registers.
   char buffer[64];
   snprintf(buffer, sizeof(buffer), "unaligned %s at 0x%" Px ", pc=%p\n", msg,
            addr, instr);
   SimulatorDebugger dbg(this);
   dbg.Stop(instr, buffer);
   // The debugger will return control in non-interactive mode.
   FATAL("Cannot continue execution after unaligned access.");
 }
 
-
 void Simulator::UnimplementedInstruction(Instr* instr) {
   char buffer[64];
   snprintf(buffer, sizeof(buffer), "Unimplemented instruction: pc=%p\n", instr);
   SimulatorDebugger dbg(this);
   dbg.Stop(instr, buffer);
   FATAL("Cannot continue execution after unimplemented instruction.");
 }
 
-
 intptr_t Simulator::ReadW(uword addr, Instr* instr) {
   if ((addr & 3) == 0) {
     intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
     return *ptr;
   }
   UnalignedAccess("read", addr, instr);
   return 0;
 }
 
-
 void Simulator::WriteW(uword addr, intptr_t value, Instr* instr) {
   if ((addr & 3) == 0) {
     intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
     *ptr = value;
     return;
   }
   UnalignedAccess("write", addr, instr);
 }
 
-
 uint16_t Simulator::ReadHU(uword addr, Instr* instr) {
   if ((addr & 1) == 0) {
     uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
     return *ptr;
   }
   UnalignedAccess("unsigned halfword read", addr, instr);
   return 0;
 }
 
-
 int16_t Simulator::ReadH(uword addr, Instr* instr) {
   if ((addr & 1) == 0) {
     int16_t* ptr = reinterpret_cast<int16_t*>(addr);
     return *ptr;
   }
   UnalignedAccess("signed halfword read", addr, instr);
   return 0;
 }
 
-
 void Simulator::WriteH(uword addr, uint16_t value, Instr* instr) {
   if ((addr & 1) == 0) {
     uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
     *ptr = value;
     return;
   }
   UnalignedAccess("halfword write", addr, instr);
 }
 
-
 uint8_t Simulator::ReadBU(uword addr) {
   uint8_t* ptr = reinterpret_cast<uint8_t*>(addr);
   return *ptr;
 }
 
-
 int8_t Simulator::ReadB(uword addr) {
   int8_t* ptr = reinterpret_cast<int8_t*>(addr);
   return *ptr;
 }
 
-
 void Simulator::WriteB(uword addr, uint8_t value) {
   uint8_t* ptr = reinterpret_cast<uint8_t*>(addr);
   *ptr = value;
 }
 
-
 // Synchronization primitives support.
 void Simulator::SetExclusiveAccess(uword addr) {
   Thread* thread = Thread::Current();
   ASSERT(thread != NULL);
   DEBUG_ASSERT(exclusive_access_lock_->IsOwnedByCurrentThread());
   int i = 0;
   // Find an entry for this thread in the exclusive access state.
   while ((i < kNumAddressTags) &&
          (exclusive_access_state_[i].thread != thread)) {
     i++;
   }
   // Round-robin replacement of previously used entries.
   if (i == kNumAddressTags) {
     i = next_address_tag_;
     if (++next_address_tag_ == kNumAddressTags) {
       next_address_tag_ = 0;
     }
     exclusive_access_state_[i].thread = thread;
   }
   // Remember the address being reserved.
   exclusive_access_state_[i].addr = addr;
 }
 
-
 bool Simulator::HasExclusiveAccessAndOpen(uword addr) {
   Thread* thread = Thread::Current();
   ASSERT(thread != NULL);
   ASSERT(addr != 0);
   DEBUG_ASSERT(exclusive_access_lock_->IsOwnedByCurrentThread());
   bool result = false;
   for (int i = 0; i < kNumAddressTags; i++) {
     if (exclusive_access_state_[i].thread == thread) {
       // Check whether the current thread's address reservation matches.
       if (exclusive_access_state_[i].addr == addr) {
         result = true;
       }
       exclusive_access_state_[i].addr = 0;
     } else if (exclusive_access_state_[i].addr == addr) {
       // Other threads with matching address lose their reservations.
       exclusive_access_state_[i].addr = 0;
     }
   }
   return result;
 }
 
-
 void Simulator::ClearExclusive() {
   MutexLocker ml(exclusive_access_lock_);
   // Remove the reservation for this thread.
   SetExclusiveAccess(0);
 }
 
-
 intptr_t Simulator::ReadExclusiveW(uword addr, Instr* instr) {
   MutexLocker ml(exclusive_access_lock_);
   SetExclusiveAccess(addr);
   return ReadW(addr, instr);
 }
 
-
 intptr_t Simulator::WriteExclusiveW(uword addr, intptr_t value, Instr* instr) {
   MutexLocker ml(exclusive_access_lock_);
   bool write_allowed = HasExclusiveAccessAndOpen(addr);
   if (write_allowed) {
     WriteW(addr, value, instr);
     return 0;  // Success.
   }
   return 1;  // Failure.
 }
 
-
 uword Simulator::CompareExchange(uword* address,
                                  uword compare_value,
                                  uword new_value) {
   MutexLocker ml(exclusive_access_lock_);
   // We do not get a reservation as it would be guaranteed to be found when
   // writing below. No other thread is able to make a reservation while we
   // hold the lock.
   uword value = *address;
   if (value == compare_value) {
     *address = new_value;
     // Same effect on exclusive access state as a successful STREX.
     HasExclusiveAccessAndOpen(reinterpret_cast<uword>(address));
   } else {
     // Same effect on exclusive access state as an LDREX.
     SetExclusiveAccess(reinterpret_cast<uword>(address));
   }
   return value;
 }
 
-
 uint32_t Simulator::CompareExchangeUint32(uint32_t* address,
                                           uint32_t compare_value,
                                           uint32_t new_value) {
   COMPILE_ASSERT(sizeof(uword) == sizeof(uint32_t));
   return CompareExchange(reinterpret_cast<uword*>(address),
                          static_cast<uword>(compare_value),
                          static_cast<uword>(new_value));
 }
 
-
 // Returns the top of the stack area to enable checking for stack pointer
 // validity.
 uword Simulator::StackTop() const {
   // To be safe in potential stack underflows we leave some buffer above and
   // set the stack top.
   return StackBase() +
          (OSThread::GetSpecifiedStackSize() + OSThread::kStackSizeBuffer);
 }
 
-
 bool Simulator::IsTracingExecution() const {
   return icount_ > FLAG_trace_sim_after;
 }
 
-
 // Unsupported instructions use Format to print an error and stop execution.
 void Simulator::Format(Instr* instr, const char* format) {
   OS::Print("Simulator found unsupported instruction:\n 0x%p: %s\n", instr,
             format);
   UNIMPLEMENTED();
 }
 
-
 // Checks if the current instruction should be executed based on its
 // condition bits.
 bool Simulator::ConditionallyExecute(Instr* instr) {
   switch (instr->ConditionField()) {
     case EQ:
       return z_flag_;
     case NE:
       return !z_flag_;
     case CS:
       return c_flag_;
@@ skipping 20 matching lines @@
     case LE:
       return z_flag_ || (n_flag_ != v_flag_);
     case AL:
       return true;
     default:
       UNREACHABLE();
   }
   return false;
 }
 
-
 // Calculate and set the Negative and Zero flags.
 void Simulator::SetNZFlags(int32_t val) {
   n_flag_ = (val < 0);
   z_flag_ = (val == 0);
 }
 
-
 // Set the Carry flag.
 void Simulator::SetCFlag(bool val) {
   c_flag_ = val;
 }
 
-
 // Set the oVerflow flag.
 void Simulator::SetVFlag(bool val) {
   v_flag_ = val;
 }
 
-
 // Calculate C flag value for additions (and subtractions with adjusted args).
 bool Simulator::CarryFrom(int32_t left, int32_t right, int32_t carry) {
   uint64_t uleft = static_cast<uint32_t>(left);
   uint64_t uright = static_cast<uint32_t>(right);
   uint64_t ucarry = static_cast<uint32_t>(carry);
   return ((uleft + uright + ucarry) >> 32) != 0;
 }
 
-
 // Calculate V flag value for additions (and subtractions with adjusted args).
 bool Simulator::OverflowFrom(int32_t left, int32_t right, int32_t carry) {
   int64_t result = static_cast<int64_t>(left) + right + carry;
   return (result >> 31) != (result >> 32);
 }
 
-
 // Addressing Mode 1 - Data-processing operands:
 // Get the value based on the shifter_operand with register.
 int32_t Simulator::GetShiftRm(Instr* instr, bool* carry_out) {
   Shift shift = instr->ShiftField();
   int shift_amount = instr->ShiftAmountField();
   int32_t result = get_register(instr->RmField());
   if (instr->Bit(4) == 0) {
     // by immediate
     if ((shift == ROR) && (shift_amount == 0)) {
       UnimplementedInstruction(instr);
@@ skipping 122 matching lines @@
 
       default: {
         UNREACHABLE();
         break;
       }
     }
   }
   return result;
 }
 
-
 // Addressing Mode 1 - Data-processing operands:
 // Get the value based on the shifter_operand with immediate.
 int32_t Simulator::GetImm(Instr* instr, bool* carry_out) {
   int rotate = instr->RotateField() * 2;
   int immed8 = instr->Immed8Field();
   int imm = (immed8 >> rotate) | (immed8 << (32 - rotate));
   *carry_out = (rotate == 0) ? c_flag_ : (imm < 0);
   return imm;
 }
 
-
 static int count_bits(int bit_vector) {
   int count = 0;
   while (bit_vector != 0) {
     if ((bit_vector & 1) != 0) {
       count++;
     }
     bit_vector >>= 1;
   }
   return count;
 }
 
-
 // Addressing Mode 4 - Load and Store Multiple
 void Simulator::HandleRList(Instr* instr, bool load) {
   Register rn = instr->RnField();
   int32_t rn_val = get_register(rn);
   int rlist = instr->RlistField();
   int num_regs = count_bits(rlist);
 
   uword address = 0;
   uword end_address = 0;
   switch (instr->PUField()) {
@@ skipping 46 matching lines @@
         }
         address += 4;
       }
       reg++;
       rlist >>= 1;
     }
     ASSERT(end_address == address);
   }
 }
 
-
 // Calls into the Dart runtime are based on this interface.
 typedef void (*SimulatorRuntimeCall)(NativeArguments arguments);
 
 // Calls to leaf Dart runtime functions are based on this interface.
 typedef int32_t (*SimulatorLeafRuntimeCall)(int32_t r0,
                                             int32_t r1,
                                             int32_t r2,
                                             int32_t r3);
 
 // Calls to leaf float Dart runtime functions are based on this interface.
 typedef double (*SimulatorLeafFloatRuntimeCall)(double d0, double d1);
 
 // Calls to native Dart functions are based on this interface.
 typedef void (*SimulatorBootstrapNativeCall)(NativeArguments* arguments);
 typedef void (*SimulatorNativeCall)(NativeArguments* arguments, uword target);
 
-
 void Simulator::SupervisorCall(Instr* instr) {
   int svc = instr->SvcField();
   switch (svc) {
     case Instr::kSimulatorRedirectCode: {
       SimulatorSetjmpBuffer buffer(this);
 
       if (!setjmp(buffer.buffer_)) {
         int32_t saved_lr = get_register(LR);
         Redirection* redirection = Redirection::FromSvcInstruction(instr);
         uword external = redirection->external_function();
@@ skipping 117 matching lines @@
       dbg.Stop(instr, "breakpoint");
       break;
     }
     default: {
       UNREACHABLE();
       break;
     }
   }
 }
 
-
 // Handle execution based on instruction types.
 
 // Instruction types 0 and 1 are both rolled into one function because they
 // only differ in the handling of the shifter_operand.
 void Simulator::DecodeType01(Instr* instr) {
   if (!instr->IsDataProcessing()) {
     // miscellaneous, multiply, sync primitives, extra loads and stores.
     if (instr->IsMiscellaneous()) {
       switch (instr->Bits(4, 3)) {
         case 1: {
@@ skipping 604 matching lines @@
       }
 
       default: {
         UNREACHABLE();
         break;
       }
     }
   }
 }
 
-
 void Simulator::DecodeType2(Instr* instr) {
   Register rd = instr->RdField();
   Register rn = instr->RnField();
   int32_t rn_val = get_register(rn);
   int32_t im_val = instr->Offset12Field();
   uword addr = 0;
   bool write_back = false;
   switch (instr->PUField()) {
     case 0: {
       // Format(instr, "'memop'cond'b 'rd, ['rn], #-'off12");
@@ skipping 48 matching lines @@
     } else {
       if (instr->HasL()) {
         set_register(rd, ReadW(addr, instr));
       } else {
         WriteW(addr, get_register(rd), instr);
       }
     }
   }
 }
 
-
 void Simulator::DoDivision(Instr* instr) {
   const Register rd = instr->DivRdField();
   const Register rn = instr->DivRnField();
   const Register rm = instr->DivRmField();
 
   if (!TargetCPUFeatures::integer_division_supported()) {
     UnimplementedInstruction(instr);
     return;
   }
 
@@ skipping 18 matching lines @@
     if ((rn_val == static_cast<int32_t>(0x80000000)) &&
         (rm_val == static_cast<int32_t>(0xffffffff))) {
       result = 0x80000000;
     } else {
       result = rn_val / rm_val;
     }
     set_register(rd, result);
   }
 }
 
-
 void Simulator::DecodeType3(Instr* instr) {
   if (instr->IsDivision()) {
     DoDivision(instr);
     return;
   }
   Register rd = instr->RdField();
   Register rn = instr->RnField();
   int32_t rn_val = get_register(rn);
   bool shifter_carry_out = 0;
   int32_t shifter_operand = GetShiftRm(instr, &shifter_carry_out);
@@ skipping 53 matching lines @@
     } else {
       if (instr->HasL()) {
         set_register(rd, ReadW(addr, instr));
       } else {
         WriteW(addr, get_register(rd), instr);
       }
     }
   }
 }
 
-
 void Simulator::DecodeType4(Instr* instr) {
   ASSERT(instr->Bit(22) == 0);  // only allowed to be set in privileged mode
   if (instr->HasL()) {
     // Format(instr, "ldm'cond'pu 'rn'w, 'rlist");
     HandleRList(instr, true);
   } else {
     // Format(instr, "stm'cond'pu 'rn'w, 'rlist");
     HandleRList(instr, false);
   }
 }
 
-
 void Simulator::DecodeType5(Instr* instr) {
   // Format(instr, "b'l'cond 'target");
   int off = (instr->SImmed24Field() << 2) + 8;
   intptr_t pc = get_pc();
   if (instr->HasLink()) {
     set_register(LR, pc + Instr::kInstrSize);
   }
   set_pc(pc + off);
 }
 
-
 void Simulator::DecodeType6(Instr* instr) {
   if (instr->IsVFPDoubleTransfer()) {
     Register rd = instr->RdField();
     Register rn = instr->RnField();
     if (instr->Bit(8) == 0) {
       SRegister sm = instr->SmField();
       SRegister sm1 = static_cast<SRegister>(sm + 1);
       ASSERT(sm1 < kNumberOfSRegisters);
       if (instr->Bit(20) == 1) {
         // Format(instr, "vmovrrs'cond 'rd, 'rn, {'sm', 'sm1}");
@@ skipping 111 matching lines @@
         } else {
           UnimplementedInstruction(instr);
         }
       }
     }
   } else {
     UnimplementedInstruction(instr);
   }
 }
 
-
 void Simulator::DecodeType7(Instr* instr) {
   if (instr->Bit(24) == 1) {
     // Format(instr, "svc #'svc");
     SupervisorCall(instr);
   } else if (instr->IsVFPDataProcessingOrSingleTransfer()) {
     if (instr->Bit(4) == 0) {
       // VFP Data Processing
       SRegister sd;
       SRegister sn;
       SRegister sm;
@@ skipping 375 matching lines @@
         }
       } else {
         UnimplementedInstruction(instr);
       }
     }
   } else {
     UnimplementedInstruction(instr);
   }
 }
 
-
 static float arm_reciprocal_sqrt_estimate(float a) {
   // From the ARM Architecture Reference Manual A2-87.
   if (isinf(a) || (fabs(a) >= exp2f(126)))
     return 0.0;
   else if (a == 0.0)
     return kPosInfinity;
   else if (isnan(a))
     return a;
 
   uint32_t a_bits = bit_cast<uint32_t, float>(a);
@@ skipping 34 matching lines @@
   double estimate = static_cast<double>(s) / 256.0;
   ASSERT((estimate >= 1.0) && (estimate <= (511.0 / 256.0)));
 
   // result = 0 : result_exp<7:0> : estimate<51:29>
   int32_t result_bits =
       ((result_exp & 0xff) << 23) |
       ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
   return bit_cast<float, int32_t>(result_bits);
 }
 
-
 static float arm_recip_estimate(float a) {
   // From the ARM Architecture Reference Manual A2-85.
   if (isinf(a) || (fabs(a) >= exp2f(126)))
     return 0.0;
   else if (a == 0.0)
     return kPosInfinity;
   else if (isnan(a))
     return a;
 
   uint32_t a_bits = bit_cast<uint32_t, float>(a);
@@ skipping 16 matching lines @@
   double estimate = static_cast<double>(s) / 256.0;
   ASSERT((estimate >= 1.0) && (estimate <= (511.0 / 256.0)));
 
   // result = sign : result_exp<7:0> : estimate<51:29>
   int32_t result_bits =
       (a_bits & 0x80000000) | ((result_exp & 0xff) << 23) |
       ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
   return bit_cast<float, int32_t>(result_bits);
 }
 
-
 static void simd_value_swap(simd_value_t* s1,
                             int i1,
                             simd_value_t* s2,
                             int i2) {
   uint32_t tmp;
   tmp = s1->data_[i1].u;
   s1->data_[i1].u = s2->data_[i2].u;
   s2->data_[i2].u = tmp;
 }
 
-
 void Simulator::DecodeSIMDDataProcessing(Instr* instr) {
   ASSERT(instr->ConditionField() == kSpecialCondition);
 
   if (instr->Bit(6) == 1) {
     // Q = 1, Using 128-bit Q registers.
     const QRegister qd = instr->QdField();
     const QRegister qn = instr->QnField();
     const QRegister qm = instr->QmField();
     simd_value_t s8d;
     simd_value_t s8n;
@@ skipping 471 matching lines @@
         }
       }
 
       set_dregister_bits(dd, result);
     } else {
       UnimplementedInstruction(instr);
     }
   }
 }
 
-
 // Executes the current instruction.
 void Simulator::InstructionDecode(Instr* instr) {
   pc_modified_ = false;
   if (IsTracingExecution()) {
     THR_Print("%" Pu64 " ", icount_);
     const uword start = reinterpret_cast<uword>(instr);
     const uword end = start + Instr::kInstrSize;
     if (FLAG_support_disassembler) {
       Disassembler::Disassemble(start, end);
     } else {
@@ skipping 47 matching lines @@
         UNREACHABLE();
         break;
       }
     }
   }
   if (!pc_modified_) {
     set_register(PC, reinterpret_cast<int32_t>(instr) + Instr::kInstrSize);
   }
 }
 
-
 void Simulator::Execute() {
   // Get the PC to simulate. Cannot use the accessor here as we need the
   // raw PC value and not the one used as input to arithmetic instructions.
   uword program_counter = get_pc();
 
   if (FLAG_stop_sim_at == ULLONG_MAX) {
     // Fast version of the dispatch loop without checking whether the simulator
     // should be stopping at a particular executed instruction.
     while (program_counter != kEndSimulatingPC) {
       Instr* instr = reinterpret_cast<Instr*>(program_counter);
@@ skipping 20 matching lines @@
       } else if (IsIllegalAddress(program_counter)) {
         HandleIllegalAccess(program_counter, instr);
       } else {
         InstructionDecode(instr);
       }
       program_counter = get_pc();
     }
   }
 }
 
-
 int64_t Simulator::Call(int32_t entry,
                         int32_t parameter0,
                         int32_t parameter1,
                         int32_t parameter2,
                         int32_t parameter3,
                         bool fp_return,
                         bool fp_args) {
   // Save the SP register before the call so we can restore it.
   int32_t sp_before_call = get_register(SP);
 
@@ skipping 141 matching lines @@
   int64_t return_value;
   if (fp_return) {
     ASSERT(TargetCPUFeatures::vfp_supported());
     return_value = bit_cast<int64_t, double>(get_dregister(D0));
   } else {
     return_value = Utils::LowHighTo64Bits(get_register(R0), get_register(R1));
   }
   return return_value;
 }
 
-
 void Simulator::JumpToFrame(uword pc, uword sp, uword fp, Thread* thread) {
   // Walk over all setjmp buffers (simulated --> C++ transitions)
   // and try to find the setjmp associated with the simulated stack pointer.
   SimulatorSetjmpBuffer* buf = last_setjmp_buffer();
   while (buf->link() != NULL && buf->link()->sp() <= sp) {
     buf = buf->link();
   }
   ASSERT(buf != NULL);
 
   // The C++ caller has not cleaned up the stack memory of C++ frames.
@@ skipping 18 matching lines @@
   set_register(CODE_REG, code);
   set_register(PP, pp);
   buf->Longjmp();
 }
 
 }  // namespace dart
 
 #endif  // defined(USING_SIMULATOR)
 
 #endif  // defined TARGET_ARCH_ARM