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Side by Side Diff: runtime/vm/constants_arm64.h

Issue 2974233002: VM: Re-format to use at most one newline between functions (Closed)
Patch Set: Rebase and merge Created 3 years, 5 months ago
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1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #ifndef RUNTIME_VM_CONSTANTS_ARM64_H_ 5 #ifndef RUNTIME_VM_CONSTANTS_ARM64_H_
6 #define RUNTIME_VM_CONSTANTS_ARM64_H_ 6 #define RUNTIME_VM_CONSTANTS_ARM64_H_
7 7
8 #include "platform/assert.h" 8 #include "platform/assert.h"
9 9
10 namespace dart { 10 namespace dart {
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51 ZR = 33, 51 ZR = 33,
52 52
53 // Aliases. 53 // Aliases.
54 IP0 = R16, 54 IP0 = R16,
55 IP1 = R17, 55 IP1 = R17,
56 SP = R15, 56 SP = R15,
57 FP = R29, 57 FP = R29,
58 LR = R30, 58 LR = R30,
59 }; 59 };
60 60
61
62 enum VRegister { 61 enum VRegister {
63 V0 = 0, 62 V0 = 0,
64 V1 = 1, 63 V1 = 1,
65 V2 = 2, 64 V2 = 2,
66 V3 = 3, 65 V3 = 3,
67 V4 = 4, 66 V4 = 4,
68 V5 = 5, 67 V5 = 5,
69 V6 = 6, 68 V6 = 6,
70 V7 = 7, 69 V7 = 7,
71 V8 = 8, 70 V8 = 8,
(...skipping 59 matching lines...) Expand 10 before | Expand all | Expand 10 after
131 // Masks, sizes, etc. 130 // Masks, sizes, etc.
132 const int kXRegSizeInBits = 64; 131 const int kXRegSizeInBits = 64;
133 const int kWRegSizeInBits = 32; 132 const int kWRegSizeInBits = 32;
134 const int64_t kXRegMask = 0xffffffffffffffffL; 133 const int64_t kXRegMask = 0xffffffffffffffffL;
135 const int64_t kWRegMask = 0x00000000ffffffffL; 134 const int64_t kWRegMask = 0x00000000ffffffffL;
136 135
137 // List of registers used in load/store multiple. 136 // List of registers used in load/store multiple.
138 typedef uint32_t RegList; 137 typedef uint32_t RegList;
139 const RegList kAllCpuRegistersList = 0xFFFF; 138 const RegList kAllCpuRegistersList = 0xFFFF;
140 139
141
142 // C++ ABI call registers. 140 // C++ ABI call registers.
143 const RegList kAbiArgumentCpuRegs = (1 << R0) | (1 << R1) | (1 << R2) | 141 const RegList kAbiArgumentCpuRegs = (1 << R0) | (1 << R1) | (1 << R2) |
144 (1 << R3) | (1 << R4) | (1 << R5) | 142 (1 << R3) | (1 << R4) | (1 << R5) |
145 (1 << R6) | (1 << R7); 143 (1 << R6) | (1 << R7);
146 const RegList kAbiPreservedCpuRegs = 144 const RegList kAbiPreservedCpuRegs =
147 (1 << R19) | (1 << R20) | (1 << R21) | (1 << R22) | (1 << R23) | 145 (1 << R19) | (1 << R20) | (1 << R21) | (1 << R22) | (1 << R23) |
148 (1 << R24) | (1 << R25) | (1 << R26) | (1 << R27) | (1 << R28); 146 (1 << R24) | (1 << R25) | (1 << R26) | (1 << R27) | (1 << R28);
149 const Register kAbiFirstPreservedCpuReg = R19; 147 const Register kAbiFirstPreservedCpuReg = R19;
150 const Register kAbiLastPreservedCpuReg = R28; 148 const Register kAbiLastPreservedCpuReg = R28;
151 const int kAbiPreservedCpuRegCount = 10; 149 const int kAbiPreservedCpuRegCount = 10;
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624 FPIntCvtMask = 0x5f00fc00, 622 FPIntCvtMask = 0x5f00fc00,
625 FPIntCvtFixed = FPFixed | B21, 623 FPIntCvtFixed = FPFixed | B21,
626 FMOVRS = FPIntCvtFixed | B18 | B17, 624 FMOVRS = FPIntCvtFixed | B18 | B17,
627 FMOVSR = FPIntCvtFixed | B18 | B17 | B16, 625 FMOVSR = FPIntCvtFixed | B18 | B17 | B16,
628 FMOVRD = FPIntCvtFixed | B22 | B18 | B17, 626 FMOVRD = FPIntCvtFixed | B22 | B18 | B17,
629 FMOVDR = FPIntCvtFixed | B22 | B18 | B17 | B16, 627 FMOVDR = FPIntCvtFixed | B22 | B18 | B17 | B16,
630 FCVTZDS = FPIntCvtFixed | B22 | B20 | B19, 628 FCVTZDS = FPIntCvtFixed | B22 | B20 | B19,
631 SCVTFD = FPIntCvtFixed | B22 | B17, 629 SCVTFD = FPIntCvtFixed | B22 | B17,
632 }; 630 };
633 631
634
635 #define APPLY_OP_LIST(_V) \ 632 #define APPLY_OP_LIST(_V) \
636 _V(DPImmediate) \ 633 _V(DPImmediate) \
637 _V(CompareBranch) \ 634 _V(CompareBranch) \
638 _V(LoadStore) \ 635 _V(LoadStore) \
639 _V(DPRegister) \ 636 _V(DPRegister) \
640 _V(DPSimd1) \ 637 _V(DPSimd1) \
641 _V(DPSimd2) \ 638 _V(DPSimd2) \
642 _V(FP) \ 639 _V(FP) \
643 _V(CompareAndBranch) \ 640 _V(CompareAndBranch) \
644 _V(ConditionalBranch) \ 641 _V(ConditionalBranch) \
(...skipping 19 matching lines...) Expand all
664 _V(LogicalShift) \ 661 _V(LogicalShift) \
665 _V(SIMDCopy) \ 662 _V(SIMDCopy) \
666 _V(SIMDThreeSame) \ 663 _V(SIMDThreeSame) \
667 _V(SIMDTwoReg) \ 664 _V(SIMDTwoReg) \
668 _V(FPCompare) \ 665 _V(FPCompare) \
669 _V(FPOneSource) \ 666 _V(FPOneSource) \
670 _V(FPTwoSource) \ 667 _V(FPTwoSource) \
671 _V(FPImm) \ 668 _V(FPImm) \
672 _V(FPIntCvt) 669 _V(FPIntCvt)
673 670
674
675 enum Shift { 671 enum Shift {
676 kNoShift = -1, 672 kNoShift = -1,
677 LSL = 0, // Logical shift left 673 LSL = 0, // Logical shift left
678 LSR = 1, // Logical shift right 674 LSR = 1, // Logical shift right
679 ASR = 2, // Arithmetic shift right 675 ASR = 2, // Arithmetic shift right
680 ROR = 3, // Rotate right 676 ROR = 3, // Rotate right
681 kMaxShift = 4, 677 kMaxShift = 4,
682 }; 678 };
683 679
684 enum Extend { 680 enum Extend {
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799 kExtendTypeShift = 13, 795 kExtendTypeShift = 13,
800 kExtendTypeBits = 3, 796 kExtendTypeBits = 3,
801 797
802 // Hint Fields. 798 // Hint Fields.
803 kHintCRmShift = 8, 799 kHintCRmShift = 8,
804 kHintCRmBits = 4, 800 kHintCRmBits = 4,
805 kHintOp2Shift = 5, 801 kHintOp2Shift = 5,
806 kHintOp2Bits = 3, 802 kHintOp2Bits = 3,
807 }; 803 };
808 804
809
810 // Helper functions for decoding logical immediates. 805 // Helper functions for decoding logical immediates.
811 static inline uint64_t RotateRight(uint64_t value, 806 static inline uint64_t RotateRight(uint64_t value,
812 uint8_t rotate, 807 uint8_t rotate,
813 uint8_t width) { 808 uint8_t width) {
814 ASSERT(width <= 64); 809 ASSERT(width <= 64);
815 rotate &= 63; 810 rotate &= 63;
816 return ((value & ((1ULL << rotate) - 1ULL)) << (width - rotate)) | 811 return ((value & ((1ULL << rotate) - 1ULL)) << (width - rotate)) |
817 (value >> rotate); 812 (value >> rotate);
818 } 813 }
819 814
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1128 static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); } 1123 static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); }
1129 1124
1130 private: 1125 private:
1131 DISALLOW_ALLOCATION(); 1126 DISALLOW_ALLOCATION();
1132 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr); 1127 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
1133 }; 1128 };
1134 1129
1135 } // namespace dart 1130 } // namespace dart
1136 1131
1137 #endif // RUNTIME_VM_CONSTANTS_ARM64_H_ 1132 #endif // RUNTIME_VM_CONSTANTS_ARM64_H_
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