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Side by Side Diff: runtime/vm/assembler_x64_test.cc

Issue 2965723002: VM: Reland Inline instance object hash code into object header on 64bit. (Closed)
Patch Set: Fix snapshot incompatibility that sank Flutter Gallery Created 3 years, 5 months ago
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1 // Copyright (c) 2012, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2012, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_X64) 6 #if defined(TARGET_ARCH_X64)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/os.h" 9 #include "vm/os.h"
10 #include "vm/unit_test.h" 10 #include "vm/unit_test.h"
(...skipping 1731 matching lines...) Expand 10 before | Expand all | Expand 10 after
1742 EXPECT_EQ(0, reinterpret_cast<LogicalTestCode>(test->entry())()); 1742 EXPECT_EQ(0, reinterpret_cast<LogicalTestCode>(test->entry())());
1743 } 1743 }
1744 1744
1745 1745
1746 ASSEMBLER_TEST_GENERATE(CompareSwapEQ, assembler) { 1746 ASSEMBLER_TEST_GENERATE(CompareSwapEQ, assembler) {
1747 __ movq(RAX, Immediate(0)); 1747 __ movq(RAX, Immediate(0));
1748 __ pushq(RAX); 1748 __ pushq(RAX);
1749 __ movq(RAX, Immediate(4)); 1749 __ movq(RAX, Immediate(4));
1750 __ movq(RCX, Immediate(0)); 1750 __ movq(RCX, Immediate(0));
1751 __ movq(Address(RSP, 0), RAX); 1751 __ movq(Address(RSP, 0), RAX);
1752 __ lock_cmpxchgq(Address(RSP, 0), RCX); 1752 __ LockCmpxchgq(Address(RSP, 0), RCX);
1753 __ popq(RAX); 1753 __ popq(RAX);
1754 __ ret(); 1754 __ ret();
1755 } 1755 }
1756 1756
1757 1757
1758 ASSEMBLER_TEST_RUN(CompareSwapEQ, test) { 1758 ASSEMBLER_TEST_RUN(CompareSwapEQ, test) {
1759 typedef int (*CompareSwapEQCode)(); 1759 typedef int (*CompareSwapEQCode)();
1760 EXPECT_EQ(0, reinterpret_cast<CompareSwapEQCode>(test->entry())()); 1760 EXPECT_EQ(0, reinterpret_cast<CompareSwapEQCode>(test->entry())());
1761 } 1761 }
1762 1762
1763 1763
1764 ASSEMBLER_TEST_GENERATE(CompareSwapNEQ, assembler) { 1764 ASSEMBLER_TEST_GENERATE(CompareSwapNEQ, assembler) {
1765 __ movq(RAX, Immediate(0)); 1765 __ movq(RAX, Immediate(0));
1766 __ pushq(RAX); 1766 __ pushq(RAX);
1767 __ movq(RAX, Immediate(2)); 1767 __ movq(RAX, Immediate(2));
1768 __ movq(RCX, Immediate(4)); 1768 __ movq(RCX, Immediate(4));
1769 __ movq(Address(RSP, 0), RCX); 1769 __ movq(Address(RSP, 0), RCX);
1770 __ lock_cmpxchgq(Address(RSP, 0), RCX); 1770 __ LockCmpxchgq(Address(RSP, 0), RCX);
1771 __ popq(RAX); 1771 __ popq(RAX);
1772 __ ret(); 1772 __ ret();
1773 } 1773 }
1774 1774
1775 1775
1776 ASSEMBLER_TEST_RUN(CompareSwapNEQ, test) { 1776 ASSEMBLER_TEST_RUN(CompareSwapNEQ, test) {
1777 typedef int (*CompareSwapNEQCode)(); 1777 typedef int (*CompareSwapNEQCode)();
1778 EXPECT_EQ(4, reinterpret_cast<CompareSwapNEQCode>(test->entry())()); 1778 EXPECT_EQ(4, reinterpret_cast<CompareSwapNEQCode>(test->entry())());
1779 } 1779 }
1780 1780
1781 1781
1782 ASSEMBLER_TEST_GENERATE(CompareSwapEQ32, assembler) {
1783 __ movq(RAX, Immediate(0x100000000));
1784 __ pushq(RAX);
1785 __ movq(RAX, Immediate(4));
1786 __ movq(RCX, Immediate(0));
1787 // 32 bit store of 4.
1788 __ movl(Address(RSP, 0), RAX);
1789 // Compare 32 bit memory location with RAX (4) and write 0.
1790 __ LockCmpxchgl(Address(RSP, 0), RCX);
1791 // Pop unchanged high word and zeroed out low word.
1792 __ popq(RAX);
1793 __ ret();
1794 }
1795
1796
1797 ASSEMBLER_TEST_RUN(CompareSwapEQ32, test) {
1798 typedef intptr_t (*CompareSwapEQ32Code)();
1799 EXPECT_EQ(0x100000000,
1800 reinterpret_cast<CompareSwapEQ32Code>(test->entry())());
1801 }
1802
1803
1804 ASSEMBLER_TEST_GENERATE(CompareSwapNEQ32, assembler) {
1805 __ movq(RAX, Immediate(0x100000000));
1806 __ pushq(RAX);
1807 __ movq(RAX, Immediate(2));
1808 __ movq(RCX, Immediate(4));
1809 __ movl(Address(RSP, 0), RCX);
1810 __ LockCmpxchgl(Address(RSP, 0), RCX);
1811 __ popq(RAX);
1812 __ ret();
1813 }
1814
1815
1816 ASSEMBLER_TEST_RUN(CompareSwapNEQ32, test) {
1817 typedef intptr_t (*CompareSwapNEQ32Code)();
1818 EXPECT_EQ(0x100000004l,
1819 reinterpret_cast<CompareSwapNEQ32Code>(test->entry())());
1820 }
1821
1822
1782 ASSEMBLER_TEST_GENERATE(Exchange, assembler) { 1823 ASSEMBLER_TEST_GENERATE(Exchange, assembler) {
1783 __ movq(RAX, Immediate(kLargeConstant)); 1824 __ movq(RAX, Immediate(kLargeConstant));
1784 __ movq(RDX, Immediate(kAnotherLargeConstant)); 1825 __ movq(RDX, Immediate(kAnotherLargeConstant));
1785 __ xchgq(RAX, RDX); 1826 __ xchgq(RAX, RDX);
1786 __ subq(RAX, RDX); 1827 __ subq(RAX, RDX);
1787 __ ret(); 1828 __ ret();
1788 } 1829 }
1789 1830
1790 1831
1791 ASSEMBLER_TEST_RUN(Exchange, test) { 1832 ASSEMBLER_TEST_RUN(Exchange, test) {
(...skipping 1788 matching lines...) Expand 10 before | Expand all | Expand 10 after
3580 int res = reinterpret_cast<ConditionalMovesNoOverflowCode>(test->entry())( 3621 int res = reinterpret_cast<ConditionalMovesNoOverflowCode>(test->entry())(
3581 0x7fffffffffffffff, 2); 3622 0x7fffffffffffffff, 2);
3582 EXPECT_EQ(1, res); 3623 EXPECT_EQ(1, res);
3583 res = reinterpret_cast<ConditionalMovesNoOverflowCode>(test->entry())(1, 1); 3624 res = reinterpret_cast<ConditionalMovesNoOverflowCode>(test->entry())(1, 1);
3584 EXPECT_EQ(0, res); 3625 EXPECT_EQ(0, res);
3585 } 3626 }
3586 3627
3587 } // namespace dart 3628 } // namespace dart
3588 3629
3589 #endif // defined TARGET_ARCH_X64 3630 #endif // defined TARGET_ARCH_X64
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