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1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #ifndef VM_CONSTANTS_ARM64_H_ | 5 #ifndef VM_CONSTANTS_ARM64_H_ |
6 #define VM_CONSTANTS_ARM64_H_ | 6 #define VM_CONSTANTS_ARM64_H_ |
7 | 7 |
8 #include "platform/assert.h" | 8 #include "platform/assert.h" |
9 | 9 |
10 namespace dart { | 10 namespace dart { |
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450 EOR = LogicalShiftFixed | B30, | 450 EOR = LogicalShiftFixed | B30, |
451 EON = LogicalShiftFixed | B30 | B21, | 451 EON = LogicalShiftFixed | B30 | B21, |
452 ANDS = LogicalShiftFixed | B30 | B29, | 452 ANDS = LogicalShiftFixed | B30 | B29, |
453 BICS = LogicalShiftFixed | B30 | B29 | B21, | 453 BICS = LogicalShiftFixed | B30 | B29 | B21, |
454 }; | 454 }; |
455 | 455 |
456 // C.3.6.5 | 456 // C.3.6.5 |
457 enum SIMDCopyOp { | 457 enum SIMDCopyOp { |
458 SIMDCopyMask = 0x9fe08400, | 458 SIMDCopyMask = 0x9fe08400, |
459 SIMDCopyFixed = DPSimd1Fixed | B10, | 459 SIMDCopyFixed = DPSimd1Fixed | B10, |
| 460 VDUPI = SIMDCopyFixed | B30 | B11, |
| 461 VINSI = SIMDCopyFixed | B30 | B12 | B11, |
| 462 VMOVW = SIMDCopyFixed | B13 | B12 | B11, |
| 463 VMOVX = SIMDCopyFixed | B30 | B13 | B12 | B11, |
460 VDUP = SIMDCopyFixed | B30, | 464 VDUP = SIMDCopyFixed | B30, |
461 VINS = SIMDCopyFixed | B30 | B29, | 465 VINS = SIMDCopyFixed | B30 | B29, |
462 }; | 466 }; |
463 | 467 |
464 // C.3.6.16 | 468 // C.3.6.16 |
465 enum SIMDThreeSameOp { | 469 enum SIMDThreeSameOp { |
466 SIMDThreeSameMask = 0x9f200400, | 470 SIMDThreeSameMask = 0x9f200400, |
467 SIMDThreeSameFixed = DPSimd1Fixed | B21 | B10, | 471 SIMDThreeSameFixed = DPSimd1Fixed | B21 | B10, |
| 472 VAND = SIMDThreeSameFixed | B30 | B12 | B11, |
| 473 VORR = SIMDThreeSameFixed | B30 | B23 | B12 | B11, |
| 474 VEOR = SIMDThreeSameFixed | B30 | B29 | B12 | B11, |
| 475 VADDW = SIMDThreeSameFixed | B30 | B23 | B15, |
| 476 VADDX = SIMDThreeSameFixed | B30 | B23 | B22 | B15, |
| 477 VSUBW = SIMDThreeSameFixed | B30 | B29 | B23 | B15, |
| 478 VSUBX = SIMDThreeSameFixed | B30 | B29 | B23 | B22 | B15, |
468 VADDS = SIMDThreeSameFixed | B30 | B15 | B14 | B12, | 479 VADDS = SIMDThreeSameFixed | B30 | B15 | B14 | B12, |
469 VADDD = SIMDThreeSameFixed | B30 | B22 | B15 | B14 | B12, | 480 VADDD = SIMDThreeSameFixed | B30 | B22 | B15 | B14 | B12, |
470 VSUBS = SIMDThreeSameFixed | B30 | B23 | B15 | B14 | B12, | 481 VSUBS = SIMDThreeSameFixed | B30 | B23 | B15 | B14 | B12, |
471 VSUBD = SIMDThreeSameFixed | B30 | B23 | B22 | B15 | B14 | B12, | 482 VSUBD = SIMDThreeSameFixed | B30 | B23 | B22 | B15 | B14 | B12, |
472 VMULS = SIMDThreeSameFixed | B30 | B29 | B15 | B14 | B12 | B11, | 483 VMULS = SIMDThreeSameFixed | B30 | B29 | B15 | B14 | B12 | B11, |
473 VMULD = SIMDThreeSameFixed | B30 | B29 | B22 | B15 | B14 | B12 | B11, | 484 VMULD = SIMDThreeSameFixed | B30 | B29 | B22 | B15 | B14 | B12 | B11, |
474 VDIVS = SIMDThreeSameFixed | B30 | B29 | B15 | B14 | B13 | B12 | B11, | 485 VDIVS = SIMDThreeSameFixed | B30 | B29 | B15 | B14 | B13 | B12 | B11, |
475 VDIVD = SIMDThreeSameFixed | B30 | B29 | B22 | B15 | B14 | B13 | B12 | B11, | 486 VDIVD = SIMDThreeSameFixed | B30 | B29 | B22 | B15 | B14 | B13 | B12 | B11, |
476 }; | 487 }; |
477 | 488 |
| 489 // C.3.6.17 |
| 490 enum SIMDTwoRegOp { |
| 491 SIMDTwoRegMask = 0x9f3e0c00, |
| 492 SIMDTwoRegFixed = DPSimd1Fixed | B21 | B11, |
| 493 VNOT = SIMDTwoRegFixed | B30 | B29 | B14 | B12, |
| 494 VABSS = SIMDTwoRegFixed | B30 | B23 | B15 | B14 | B13 | B12, |
| 495 VNEGS = SIMDTwoRegFixed | B30 | B29 | B23 | B15 | B14 | B13 | B12, |
| 496 VABSD = SIMDTwoRegFixed | B30 | B23 | B22 | B15 | B14 | B13 | B12, |
| 497 VNEGD = SIMDTwoRegFixed | B30 | B29 | B23 | B22 | B15 | B14 | B13 | B12, |
| 498 }; |
| 499 |
478 // C.3.6.22 | 500 // C.3.6.22 |
479 enum FPCompareOp { | 501 enum FPCompareOp { |
480 FPCompareMask = 0xffa0fc07, | 502 FPCompareMask = 0xffa0fc07, |
481 FPCompareFixed = FPFixed | B21 | B13, | 503 FPCompareFixed = FPFixed | B21 | B13, |
482 FCMPD = FPCompareFixed | B22, | 504 FCMPD = FPCompareFixed | B22, |
483 FCMPZD = FPCompareFixed | B22 | B3, | 505 FCMPZD = FPCompareFixed | B22 | B3, |
484 }; | 506 }; |
485 | 507 |
486 // C3.6.25 | 508 // C3.6.25 |
487 enum FPOneSourceOp { | 509 enum FPOneSourceOp { |
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545 _V(LogicalImm) \ | 567 _V(LogicalImm) \ |
546 _V(MoveWide) \ | 568 _V(MoveWide) \ |
547 _V(PCRel) \ | 569 _V(PCRel) \ |
548 _V(AddSubShiftExt) \ | 570 _V(AddSubShiftExt) \ |
549 _V(ConditionalSelect) \ | 571 _V(ConditionalSelect) \ |
550 _V(MiscDP2Source) \ | 572 _V(MiscDP2Source) \ |
551 _V(MiscDP3Source) \ | 573 _V(MiscDP3Source) \ |
552 _V(LogicalShift) \ | 574 _V(LogicalShift) \ |
553 _V(SIMDCopy) \ | 575 _V(SIMDCopy) \ |
554 _V(SIMDThreeSame) \ | 576 _V(SIMDThreeSame) \ |
| 577 _V(SIMDTwoReg) \ |
555 _V(FPCompare) \ | 578 _V(FPCompare) \ |
556 _V(FPOneSource) \ | 579 _V(FPOneSource) \ |
557 _V(FPTwoSource) \ | 580 _V(FPTwoSource) \ |
558 _V(FPImm) \ | 581 _V(FPImm) \ |
559 _V(FPIntCvt) \ | 582 _V(FPIntCvt) \ |
560 | 583 |
561 | 584 |
562 enum Shift { | 585 enum Shift { |
563 kNoShift = -1, | 586 kNoShift = -1, |
564 LSL = 0, // Logical shift left | 587 LSL = 0, // Logical shift left |
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975 static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); } | 998 static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); } |
976 | 999 |
977 private: | 1000 private: |
978 DISALLOW_ALLOCATION(); | 1001 DISALLOW_ALLOCATION(); |
979 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr); | 1002 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr); |
980 }; | 1003 }; |
981 | 1004 |
982 } // namespace dart | 1005 } // namespace dart |
983 | 1006 |
984 #endif // VM_CONSTANTS_ARM64_H_ | 1007 #endif // VM_CONSTANTS_ARM64_H_ |
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